Ferroelectric memory based on nanostructures
© Liu et al.; licensee Springer. 2012
Received: 17 February 2012
Accepted: 23 April 2012
Published: 1 June 2012
In the past decades, ferroelectric materials have attracted wide attention due to their applications in nonvolatile memory devices (NVMDs) rendered by the electrically switchable spontaneous polarizations. Furthermore, the combination of ferroelectric and nanomaterials opens a new route to fabricating a nanoscale memory device with ultrahigh memory integration, which greatly eases the ever increasing scaling and economic challenges encountered in the traditional semiconductor industry. In this review, we summarize the recent development of the nonvolatile ferroelectric field effect transistor (FeFET) memory devices based on nanostructures. The operating principles of FeFET are introduced first, followed by the discussion of the real FeFET memory nanodevices based on oxide nanowires, nanoparticles, semiconductor nanotetrapods, carbon nanotubes, and graphene. Finally, we present the opportunities and challenges in nanomemory devices and our views on the future prospects of NVMDs.
According to Moore's law, the number of transistors accommodated on the integrated circuits doubles roughly every 18 months and so does the performance . As the essential part of the integrated circuits, nonvolatile memory devices (NVMDs) have been heavily deployed in portable electronic devices to realize secure and fast data transfer, such as the ID cards, MP3 player, and so on. The versatile NVMDs should be reprogrammable and require a mechanism of repeatable switching between different binary states [2–4]. The ferroelectric field effect transistor (FeFET) is one of such promising NVMDs with the lowest power consumption  and high speed bearing comparable to that of dynamic random access memory . Other memory mechanisms including polarization induced by the polar molecule (such as H2O) adsorption/desorption and by the defect-related charge-trapping layer have also been studied [7–9]. However, both the adsorption/desorption and the defect-related charge-trapping mechanisms suffer from reproducibility problems caused by the nature that neither the adsorption/desorption of polar molecules nor the amount or distribution of the defects can be exactly controlled, which creates a great challenge for reproduction. This review therefore gives an overview of the advances of FeFET for NVMDs in the current state and the future.
The simple architectural structures and mature fabrication technologies of the traditional thin-film transistor have sparked a surge of interest in the thin-film FeFET for NVMDs. However, theoretical calculation has shown that the planar corrugations effectively worsen the distribution of polarization bound charges , due to smearing of the phase transition. It's well recognized that the physical properties of ferroelectric thin film are significantly limited by a critical size [11–13]. Furthermore, with the decrease in the thickness of the ferroelectric thin film, the remnant polarization (Pr) decreases and the coercive field (Ec) turns up increasingly due to the collapsed dielectric response [14–18]. This imposes a serious limitation on the desired integrated density and leads to poor performance in the thin-film transistor-based NVMDs . In order to fulfill the particularly required performance such as retention time, endurance, response time, and/or power consumption, plenty of nanomaterials and alternative technologies have been utilized to enhance the integrated density and performance, which open a route to overcome the scaling limitations and economic challenges encountered in the current silicon industry [20–24]. In this survey, we summarize the current researches on fabricating a promising nano-FeFET. This paper is organized as follows: the ‘Ferroelectric and the operating principle of FeFET’ section summarizes the structure and characters of ferroelectric and the operating principle of FeFET. The ‘Current researches’ section reviews the current state of nano-FeFET devices, including the combinations of ferroelectrics with nanowires (NWs) [17, 25–28], nanoparticles (NPs) [29–32], three-dimensional (3D) nanostructures [33–35], carbon nanotubes (CNTs) [36–45], and graphene [43, 46–49]. The ‘Challenges and improvements’ section explains the fatigue mechanism and provides an overview of the efforts that have been taken to improve the fatigue resistance. The ‘Conclusions’ section gives an outlook and conclusion for the practical applications of FeFET.
Ferroelectric and the operating principle of FeFET
The uniform characters of ferroelectrics offer opportunities for fabricating NVMDs. Devices based on one-dimensional (1D) [17, 25, 37–39] or two-dimensional (2D) [43, 46] nanostructures have been realized with excellent performance [50, 51]. This section is divided into two parts: Ferroelectric is introduced first followed by the descriptions of the structure and principle of polarization. The operating and programming principles of FeFET for memory are then presented.
With the development of the fundamental material science, tremendous progress has been made to fabricate FeFET for NVMDs based on coetaneous advanced materials. In this section, we discuss the current research on FeFET for NVMDs.
Oxide NW-based FeFET
Furthermore, the synthesis methods applied here demonstrated a simple room-temperature process for integrating the FE NPs with ZnO NW to fabricate the multi-bit memory device. The device fabricated in this way had a remarkably high on/off ratio of 104 and a long retention time over 4 × 104 s, which made it easy to recognize the two binary states. This work thus provided a viable route to fabricate high density NVMDs to overcome the existing physical and technological limitations.
In order to exploit the bottom-up technology, extensive studies on 3D structure-based devices have flourished, inspired by the peculiar prosperity of the architectures. Depending on the kinetics of the growth process, two crystal structures of one same compound can exist stably. Despite the changes in size, the additional structure provides more electronic states and characters. These special features provide the precious opportunity for making efficient nanodevices. CdS nanotetrapods provide a typical example in which each individual nanotetrapod is combined with the pyramidal-shaped zincblende structure core and wurtzite arms, with the electrons and holes located in each other, respectively. Moreover, the bandgap of the arms is larger than the one of the core. With the type II band alignment, a peculiar electron transport is observed.
The coupling between size effect and fatigue in different FE systems
BaTiO3, SrTiO3, BST, PZT
BTO/metal, BST/Pt, PZT/Pt, Ni/SrTiO3Pt
BaTiO3, SrTiO3, BST, PZT
BIT/Sb-doped SnO2, BIT/SRO
The performance of the oxide NW-based FeFET is predetermined by the material properties, such as the intrinsic defects and poor field-effect mobility. As a flexible and high carrier mobility material with no dangling bond, the carriers in the carbon nanotube (CNT) can realize 1D near-ballistic transport at room temperature [76, 77], which is the inherent property that is absent in the traditional oxide NWs . Due to the decrease of the density of states over the increasing energy, the same amount of carriers can induce a more intensified shift of Fermi level than in traditional oxide NWs . CNT therefore has attracted more and more attention with new researches focusing on fabricating CNT-based FET in the past decades [78, 79]. With the narrow bandgap of 0.5 eV, the depolarization field is suppressed in CNT, which supplies a much more stable remnant polarization than the traditional oxide NWs. Thus, the enhancement of performance can be obtained from the CNT-based FeFET memory device. However, there still exist many intrinsic flaws in the fabrication of FeFETs. For example, the defects on the interface between the FE layer and single-wall carbon nanotube (SWCNT) can trap charges and hence lead to deterioration of polarization. In addition, the temperature-dependent charge-store memory effect is not controllable as the amount and the distribution of the defects are uncontrollable . Hence, controlling the ‘floating gates’ distributed along the SWCNT channel has been proved difficult.
Unlike the traditional semiconductor, graphene does not have bandgap. Therefore, the graphene-based FET usually has poor on/off ratio at room temperature [81, 82]. Although it has no advantages for digital switches, its high carrier mobility and excellent transconductance make it an ideal material for the radio frequency analog electronics in the logic integrated circuit [83–86]. The high carrier mobility also makes it a promising candidate for the next-generation ultrafast NVMDs [47, 87]. Moreover, the enhanced interfacial coupling makes the performance of the graphene-based memory device much more elevated [43, 46].
Challenges and improvements
Oxide conductor as electrodes
According to the model proposed by Dawber  and Scott , oxygen vacancies in ferroelectric films are believed to be able to impact the fatigue. Due to the local phase decomposition of ferroelectric and the oxygen vacancy migration towards the FE-electrode interface, accumulating and forming a pin structure, the remnant polarization is dramatically decreased . In the typical example of PZT, the oxide conductive materials were utilized as the electrodes , which effectively blocked the diffusion effect in each interface. The crystalline structures therefore were not corroded, showing no fatigue behavior. The size effect was associated to the fatigue behavior as well. Table 1 shows a few ferroelectric systems and the characteristics of size effect in relation to fatigue behavior .
Reduction of interfacial states
This work was supported by the MOE NCET-10-0643 and NSFC grant (nos. 11104207 and 10975109) as well as ‘the grant of state key laboratory of advanced technology for materials synthesis and processing (Wuhan University of Technology)’.
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