RF performances of inductors integrated on localized p+-type porous silicon regions
© Capelle et al.; licensee Springer. 2012
Received: 27 April 2012
Accepted: 14 July 2012
Published: 25 September 2012
To study the influence of localized porous silicon regions on radiofrequency performances of passive devices, inductors were integrated on localized porous silicon regions, full porous silicon sheet, bulk silicon and glass substrates. In this work, a novel strong, resistant fluoropolymer mask is introduced to localize the porous silicon on the silicon wafer. Then, the quality factors and resonant frequencies obtained with the different substrates are presented. A first comparison is done between the performances of inductors integrated on same-thickness localized and full porous silicon sheet layers. The effect of the silicon regions in the decrease of performances of localized porous silicon is discussed. Then, the study shows that the localized porous silicon substrate significantly reduces losses in comparison with high-resistivity silicon or highly doped silicon bulks. These results are promising for the integration of both passive and active devices on the same silicon/porous silicon hybrid substrate.
KeywordsInductor Localized porous silicon Radiofrequency Quality factor Resonant frequency Strain Warp Fluoropolymer Fluorocarbon
The tremendous growth of mobile and wireless applications during the past decade has accelerated the development of radiofrequency (RF) technologies. More and more radio frequency-integrated circuits (RFICs) have been integrated on a single chip, with the advantage of high density of the package, low cost and small volume. To integrate both active and passive devices and to reduce substrate losses, RFIC integration could be made on substrates such as silicon on glass , silicon on sapphire or high-resistivity silicon (HR Si) [2, 3]. However, CMOS processes generally require low-resistivity silicon substrates, which are lossy and responsible for the deterioration of RF performances .
An alternative solution is the use of silicon/porous silicon hybrid substrates. Porous silicon (PS) is known for its insulating properties. Indeed, PS electrical conductivity (σ PS ) increases with frequency but remains very low even in the range of a few gigahertz . Ben Chorin and co-workers measured a conductivity modification from 10−8 to 10−5/Ω cm from direct current (DC) signal to 10 kHz . Balagurov and Timoshenko report mesoporous silicon σ of 10−7/Ω cm in DC [6, 7]. Then, the permittivity of PS (ɛPS) varies between 2 and 11.7 with the porosity according to a Vegard law. Experimental values reported in the literature have already confirmed the decreasing behavior of ɛPS when the porosity increases . The porous silicon electrical properties allow the reductions of leakage currents and eddy currents in the high-frequency field. Numerous authors show interest in this substrate with regard to bulk silicon for inductor performances (resonant frequency and quality factor) . In previous work, an increase of 250% of the maximum quality factor (Q factor) has been calculated between a 100-μm PS layer and a low-resistivity Si substrate . Integration of RF devices on localized porous silicon areas has been addressed by Populaire and Chen [11, 12].
Nevertheless, substrate losses with hybrid substrates are increased with regard to full PS sheet layers since lateral couplings with the highly conductive Si are added at the edge of PS regions. That is why deep localized PS layer areas are generally used (>100 μm). Their fabrication requires the use of a strong, resistant mask in HF-based electrolytes for long-time anodizations. Resists or metals different from noble metals have a limited resistance in HF-based solutions . Noble metals are more inert in HF, but charge accumulation at the edges of the openings could be responsible for local high-current density and silicon erosion in these areas. The strong resistance of carbon and silicon carbide layers have been respectively shown by Djenizian  and Steiner and Wang [13, 15]. Oxide/polysilicon bilayers are also a mask solution [16–18]. However, the common material employed to localize PS is a non-stoechiometric nitrid . The mask removal conditions are also a critical parameter since they have not deteriorated the fabricated PS surface.
In this work, planar inductors integrated on deep localized mesoporous silicon regions and other substrates have been characterized. First, the fabrication processes are detailed. Secondly, the RF performances of the inductors are studied by observing the Q factors and resonant frequencies. To judge the impact of the localized PS substrate on RF performances, a comparison is done with full porous silicon sheet and other common substrates such as silicon and glass.
Porous silicon localization
The PS localized regions were defined thanks to a 300-nm-thick fluorine-based (FbF) mask reported by Defforge . It was plasma-deposited at ambient temperature in an inductive coupled plasma equipment at 80 W, with C2H4 and CHF3 as gases precursors. The deposition rate is 35 nm/min. Then, a 500-nm plasma-enhanced chemical vapor deposition (PECVD) oxide was deposited and patterned to be used as a hard mask. The openings in the FbF were performed by etching in an O2 plasma, with an etching rate of 360 nm/min. Then, the oxide hard mask was etched by the HF solution during anodization. After the anodization, the FbF was removed with an O2 plasma, without damaging the PS region fabricated.
First, a 500-nm oxide layer was deposited by PECVD on top of the substrate. The inductor stack is made of two aluminum layers (1 μm) deposited at 350C by physical vapor deposition. The metal layers are separated by a 500-nm PECVD oxide. Patterns have been defined by standard photolithography and dry etching (reactive ion etching).
In this work, 1 to 28 nH inductors with various strip widths (W), number of turns (N) and internal radius (R) were fabricated and characterized. The spacing between adjacent turns (S) and the distance to the surrounding ground plane (Sg) are respectively set to 10 and 50 μm. For instance, a 5.5-turn inductor with a 30-μm strip width and an 80-μm internal radius is called W30N55R80.
RF characterization settings
The results of characterization are presented in three parts. A first comparison of inductors’ Q factors is done between the localized PS and full PS sheet substrate. Then, it is compared to the results obtained with glass and silicon, which are common substrates used for the integration of RF circuits. To finish, the influence of substrate nature on inductors, resonant frequency (fr) is presented.
Results and discussion
First, the Q factors of the inductors integrated on localized PS and on full PS sheet are compared. Table 1 shows the maximum Q factors (Qmax) obtained with these substrates for each inductor design. In any cases, for the same PS thickness, 11% to 46% decreases of the Q factor values have been measured between full PS sheet and localized PS. The coverage of the local surface area by the device area is shown by the surface ratio value in Table 1. The expected result would be that the lower the ratio is, the lower is the variation between the Q factors of localized and full PS sheet. However, this conclusion cannot be done since surface ratio could be the same for two different inductor designs. The Q factor value depends on losses due to the design and substrate. To study properly the effect of the ratio, it will be more rigorous to design several PS region areas and make the comparison on the same inductor design. In this way, losses generated by the design are similar, and the delta-Q is directly linked to the surface ratio.
Q max ( f Qmax ) of inductors integrated on localized PS and full PS sheet
Full PS sheet
Full PS sheet
Qmax (fQmax GHz)
Qmax (fQmax GHz)
Qmax (fQmax GHz)
Qmax (fQmax GHz)
In the case of the localized PS substrate, the losses caused by the Si bulk below the PS layer (Figure 5, Region 1) are similar to a same-thickness full PS sheet substrate. The hypothesis can be made that additional losses are generated in the silicon area at the edge of the PS region (Figure 5, Region 2) with the localized PS. Some lateral magnetic couplings with the inductor and losses in the pad and conductor pathway may explain the decrease of the Q11 value.
Q max ( f Qmax ) of inductors integrated on localized PS and other usual substrates
Qmax (fQmax) (GHz)
3-kΩ cm Si
20-mΩ cm Si
100-μm localized PS
200-μm localized PS
Resonant frequencies of inductors integrated on PS and other substrates
3-kΩ cm Si
20-mΩ cm Si
200-μm full PS sheet
100-μm full PS sheet
The values obtained with localized PS have not been published since the pi model (Figure 4) used to calculate the L12 values does not seem suitable to represent this substrate correctly. It can be confirmed by the negative value of Rs obtained with localized PS. A suitable model has to be developed to represent the hybrid substrate and extract the correct L12.
The interest on silicon/porous silicon hybrid substrate for the integration of RF circuits has been studied. To study the influence of hybrid substrate on the performances of passive devices, inductors have been integrated on localized PS and were characterized. The study of the quality factors on localized PS has shown the substrate losses generated by the neighboring highly doped silicon region. However, results are promising since better Q factors were obtained with localized PS with regard to highly doped silicon and high-resistivity silicon bulk. Thus, a maximum improvement of 244% of the Qmax has been obtained with localized PS with regard to highly doped Si bulk. In addition, similar resonant frequencies have been measured with full PS sheet and glass. Thus, the hybrid substrate is a serious candidate for the integration of passive and active devices since it allows increasing the passive device’s performances with regard to commonly used silicon. In addition, performances can still be improved by oxidizing the porous silicon.
- f Qmax :
frequency for one Qmax is reached
- Q max :
maximum quality factor
plasma-enhanced chemical vapor deposition
radio frequency-integrated circuit.
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