Resistive switching memory characteristics of Ge/GeO x nanowires and evidence of oxygen ion migration
© Prakash et al.; licensee Springer. 2013
Received: 13 February 2013
Accepted: 18 April 2013
Published: 8 May 2013
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© Prakash et al.; licensee Springer. 2013
Received: 13 February 2013
Accepted: 18 April 2013
Published: 8 May 2013
The resistive switching memory of Ge nanowires (NWs) in an IrO x /Al2O3/Ge NWs/SiO2/p-Si structure is investigated. Ge NWs with an average diameter of approximately 100 nm are grown by the vapor–liquid-solid technique. The core-shell structure of the Ge/GeO x NWs is confirmed by both scanning electron microscopy and high-resolution transmission electron microscopy. Defects in the Ge/GeO x NWs are observed by X-ray photoelectron spectroscopy. Broad photoluminescence spectra from 10 to 300 K are observed because of defects in the Ge/GeO x NWs, which are also useful for nanoscale resistive switching memory. The resistive switching mechanism in an IrO x /GeO x /W structure involves migration of oxygen ions under external bias, which is also confirmed by real-time observation of the surface of the device. The porous IrO x top electrode readily allows the evolved O2 gas to escape from the device. The annealed device has a low operating voltage (<4 V), low RESET current (approximately 22 μA), large resistance ratio (>103), long pulse read endurance of >105 cycles, and good data retention of >104 s. Its performance is better than that of the as-deposited device because the GeO x film in the annealed device contains more oxygen vacancies. Under SET operation, Ge/GeO x nanofilaments (or NWs) form in the GeO x film. The diameter of the conducting nanofilament is approximately 40 nm, which is calculated using a new method.
One-dimensional semiconductor nanostructures such as nanotubes and nanowires (NWs) are being actively investigated for applications in electronic, photonic, and sensor devices . Group IV semiconductor NW-based devices are attractive because of their compatibility with the existing Si complementary metal oxide semiconductor (CMOS) integrated circuit technology. Therefore, group IV NWs such as Ge/GeO x can also be used for nanoscale nonvolatile memory applications because they are compatible with CMOS technology. Resistive random access memory (RRAM) devices have received considerable interest recently because of their high performance and potential scalability [2–8]. In recent years, many solid electrolyte materials such as Ge x Se1 − x[9–12], GeS2, Ta2O5, Ag2S [15, 16], ZrO2, TiO x /ZrO2, GeSe x /TaO x , HfO2, CuTe/Al2O3, and Ti/TaO x  have been used in conductive bridging random access memory (CBRAM) applications. RRAM devices containing materials such as HfO x [5, 6], SrTiO3, TiO2[8, 23], ZrO2[24, 25], Na0.5Bi0.5TiO3, NiO x , ZnO [28, 29], TaO x [30, 31], and AlO x [32, 33] have been reported. However, GeO x has only been used in RRAM as Ni/GeO x /SrTiO x /TaN  and Cu/GeO x /W  structures and in Ge-doped HfO2 films . RRAM devices containing nanotubes and Si NWs have also been reported [37–39]. Although many switching materials and structures have been developed, the switching mechanism of RRAM devices remains unclear despite it being very important for application of RRAM. Ge/GeO x NWs in an IrO x /Al2O3/Ge NWs/SiO2/p-Si metal oxide semiconductor (MOS) structure have not been reported either. Because of the self-limitation of current compliance (CC < 20 μA) in MOS structures, here we fabricate an IrO x /GeO x /W metal-insulator-metal (MIM) structure to understand how the resistive switching mechanism involves oxygen ion migration through the porous IrO x electrode. It is also important to investigate the scalability potential of RRAM devices. The size of devices is typically limited by equipment or cost, so the diameter of conducting pathways could be investigated using switching characteristics or leaky pathways rather than by fabricating large-scale devices. We believe the feature size of RRAM devices and their scalability potential will be considered the same as the diameter of the minimum conduction path in the future. We previously investigated the effect of nanofilament diameter on the properties of CBRAM devices . However, a method to investigate the diameter of conducting paths in RRAM devices has not been developed. In this work, we determine the diameter of Ge/GeO x nanofilaments in a GeO x film within a MIM structure under SET operation using a new method. The results suggest that Ge/GeO x NWs form under SET operation in the GeO x film.
In this study, the growth of Ge NWs using the vapor–liquid-solid (VLS) technique is investigated. The fabricated core-shell Ge/GeO x NWs are characterized by field emission scanning electron microscopy and high-resolution transmission electron microscopy. Defects in the Ge/GeO x NWs are observed by X-ray photoelectron spectroscopy (XPS) and photoluminescence (PL) spectroscopy at 10 to 300 K. The resistive switching memory of the Ge/GeO x NWs in an IrO x /Al2O3/Ge NWs/p-Si structure with a self-limited low current of <20 μA is determined. The mechanism of resistive switching involves oxygen ion migration, which is observed by the evolution of oxygen gas on the top electrode (TE) in an IrO x /GeO x /W structure under sufficient applied voltage. A device exposed to post-metal annealing (PMA) exhibits low-voltage operation (<4 V), low reset current (approximately 22 μA), and better data retention of >104 s with large resistance ratio (>103) than that of the as-deposited device, which is related to an increased number of oxygen vacancies in the GeO x film. In addition, the diameter of the Ge/GeO x nanofilaments (or NWs) of approximately 40 nm is calculated using a new method under SET. The low-current operation of this RRAM device will make it useful in nanoscale nonvolatile memory applications.
Interestingly, Ge NWs could also form under SET operation of the resistive switching memory in an IrO x /GeO x /W MIM structure. Oxygen ion migration and nanofilament (or NW) diameter were also investigated using this MIM structure. Resistive switching memory devices were fabricated on 8-in. Si substrates. A 100-nm-thick W bottom electrode (BE) was deposited by rf magnetron sputtering. To define an active area, a 150-nm-thick SiO2 layer was deposited onto the BE. Standard lithography and etching processes were used to expose the active area. Then, a Ge layer with a thickness of 20 nm was deposited from a Ge target by the sputtering method described above. Ar with a flow rate of 25 sccm was used as a sputtering gas during deposition. The deposition power and time were 50 W and 3 min, respectively. An IrO x TE of approximately 100 nm was then deposited using an Ir target as outlined above. After a lift-off process, the final MIM resistive switching memory device with a size of 8 × 8 μm2 was obtained. Memory characteristics were measured using an LCR meter (HP 4285A, Palo Alto, CA, USA) and semiconductor parameter analyzer (Agilent 4156C, Santa Clara, CA, USA).
Figure 2 shows the XPS of Ge/GeO x NWs grown by the VLS method. The peaks from the Ge 3d core-level electrons were fitted using Gaussian functions. The binding energies of the Ge 3d core-level electrons are centered at 29.3 and 32.8 eV, which are related to unoxidized germanium and oxidized germanium, respectively . The peak ratio of GeO2/Ge is approximately 1:0.13. The binding energies of the Ge 2p core-level electrons were 1,218 and 1,220.4 eV (not shown here). The shift of the Ge 2p binding energies indicates the formation of Ge suboxides . This suggests that Ge/GeO x layers are observed rather than pure Ge NWs, which should help to obtain good resistive switching memory characteristics.
where h is Plank's constant and ν is frequency. The violet-blue emission occurs via the reverse reaction. This suggests that the vacancies exist in the Ge/GeO x NWs, which may improve their resistive switching memory performance.
A schematic diagram of the NW-embedded MOS capacitor in an IrO x /Al2O3/Ge NWs/p-Si structure is shown in Figure 4a. The capacitance (C)-voltage (V) hysteresis characteristics of the Ge/GeO x NW capacitors with different sweeping voltages from ±1 to ±5 V were investigated, as shown in Figure 4b. Memory windows of 1.7 and 3.1 V are observed under small sweeping gate voltages of ±3 and ±5 V, respectively. In contrast, a small memory window of 1.2 V under a sweeping gate voltage of ±7 V was observed for the device without Ge/GeO x NW capacitors because of the degradation of the GeO x film (data not shown here). The larger memory window of the device containing Ge/GeO x NW capacitors compared with those without the capacitors may be caused by effective charge trapping on the surface of the Ge/GeO x NWs. Defects on the surface of the Ge/GeO x NWs will trap holes rather than electrons because the C-V signal shifted towards the negative side, which was also observed in the PL spectrum of the NWs. Applying a larger gate voltage of >5 V caused the MOS capacitor to degrade because of conducting path formation or soft breakdown caused by the Ge-O bonds on the Ge/GeO x NW surface breaking. Generally, Ge-O bonds are weakened as the number of oxygen vacancies increases. Figure 4c shows typical I-V switching characteristics of a Ge/GeO x NW capacitor. By applying a positive voltage to the IrO x TE, oxygen ions move as a negative charge towards the Al2O3 layer and set the device at high current (SET) (the low resistance state (LRS)). By applying a negative voltage to the IrO x TE, oxygen ions move towards the surface of the Ge/GeO x NWs and oxidize the conducting path, which resets the device to low current (RESET) (the high resistance state (HRS)). The resistive switching mechanism of the MIM structure is explained later. Large SET and RESET voltages of +5.1 and −4.0 V, respectively, were found. The oxidation states of the materials in a MOS structure can be explained in terms of Gibbs free energy. The Gibbs free energies of IrO2, SiO2, Al2O3, and GeO2 at 300 K are −183.75, −853.13, −1,582.3, and −518.5 kJ/mol, respectively . This suggests that IrO2 or IrO x is an inert electrode. However, the Al2O3 and SiO2 films will oxidize more easily than the GeO2 film. Therefore, both SiO2 and Al2O3 layers will insulate the surface of the NWs. The AlO x layer will take more oxygen from GeO x /Ge NW surface. Then, the Ge NW surface will be more defective, and it is also thicker than Al2O3 (100 vs. 10 nm), which is reasonable to form the conducting filament through the Ge/GeO x NW surface rather than the filament formation in the Al2O3 film. The current passing through the NW surface will therefore be self-limited because of the insulating layers (SiO2 and Al2O3) and also the large diameter (approximately 100 nm) of the Ge NWs (i.e., long conducting pathway). As a result, the resistive switching memory of this device with a MOS structure has a low current compliance (CC) of <20 μA. Similar self-controlled current limitation caused by a series resistance effect has been reported previously [25, 34]. A high resistance ratio (HRS/LRS) of approximately 104 is observed at a read voltage of +2 V. However, after few cycles, the resistance ratio is reduced to approximately <10. This may be related to the large gate area of 3.14 × 10−4 cm2, which makes it difficult to control conducting path formation/rupture between cycles. Therefore, a small device is needed to control the repeatable SET/RESET switching cycles. Figure 4d shows the data retention characteristics of the Ge/GeO x NW capacitors. The memory device with a resistance ratio (HRS/LRS) of approximately 2 has good data retention of 2,000 s, which is suitable for use in nanoscale low-power nonvolatile memory applications. A Ge/GeO x NW resistive switching memory device can also be formed in an IrO x /GeO x /W structure under external bias, which is explained in detail below.
Core-shell Ge/GeO x NWs were prepared by the VLS technique on Au NP-coated Si substrate. Germanium-oxygen and oxygen vacancies, observed by XPS and broad PL spectra at 10 to 300 K, resulted in good resistive switching memory characteristics of the Ge/GeO x NWs in a MOS structure with a low self-compliance of <20 μA. Real-time observation of oxygen ion migration through a porous TE in an IrO x /GeO x /W structure and evolution of O2 gas during filament formation provided evidence for the resistive switching mechanism. Enhanced memory characteristics such as low-voltage operation (<4 V), low RESET current (approximately 22 μA), large resistance ratio (>103), pulse read endurance of >105 cycles, and data retention of >104 s were obtained for PMA devices because of its volatized nature and the ready formation of oxygen vacancies in the GeO x film. Furthermore, a nanofilament diameter of approximately 40 nm in the RRAM device was calculated using a new method. Overall, the properties of this memory device suggest that it is suitable for nanoscale nonvolatile memory applications.
This work was supported by Indo-Taiwan Joint Research Project. This work was also supported by the National Science Council (NSC), Taiwan under contract numbers NSC-98-2923-E-182-001-MY3 and NSC-101-2221-E-182-061.
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