Effect of concurrent joule heat and charge trapping on RESET for NbAlO fabricated by atomic layer deposition
© Zhou et al.; licensee Springer. 2013
Received: 26 October 2012
Accepted: 27 January 2013
Published: 19 February 2013
The RESET process of NbAlO-based resistive switching memory devices fabricated by atomic layer deposition is investigated at low temperatures from 80 to 200 K. We observed that the conduction mechanism of high resistance state changed from hopping conduction to Frenkel-Poole conduction with elevated temperature. It is found that the conductive filament rupture in RRAM RESET process can be attributed not only to the Joule heat generated by internal current flow through a filament but also to the charge trap/detrapping effect. The RESET current decreases upon heating. Meanwhile, the energy consumption also decreases exponentially. This phenomenon indicates the temperature-related charge trap/detrapping process which contributes to the RESET besides direct Joule heat.
KeywordsRESET process RRAM Joule heat charge trapping
NbAlO-based resistive random-access memory (RRAM) with highly uniform bipolar resistive switching behavior has been proposed for the embedded application with multi-level storage capability and excellent reliability . Generally, based on the well-accepted conductive filament hypothesis to explain the memory functional performance, several nanometer-sized filaments are indeed found in the so-called forming process. However, the conductive filament model could not clarify the origin of energy. Recently, the random circuit breaker network model [2, 3] and conical shape filament model [4, 5] are differently developed to emphasize joule heat contribution on breaker and thermochemical-type resistance switching, respectively. The long switching time and large power consumption of RESET (transition from a low resistance state (LRS) to a high resistance state (HRS)) process need improvements . Therefore, it is important to understand the joule heat generation in resistive switching RESET behavior for the fundamental understanding. A general thermal chemical reaction (TCR) model for the RESET process has been studied by calculating the filament temperature . However, we found that only the TCR itself could not explain the whole RESET process, especially for the RESET behaviors at different temperatures. In this work, we investigated the RESET process of NbAlO-based resistive switching memory device in detail at low temperatures and clarified the involved charge trapping effect.
A NbAlO film (10 nm) was fabricated on a Pt/SiO2/Si substrate via atomic layer deposition (ALD) at 300°C using Al(CH3)3 and Nb(OC2H5)5 as the precursor and H2O as the oxygen source. After deposition, the sample was post-annealed in O2 ambient at 400°C for 10 min. The TiN top electrodes with the diameter of 100 μm were fabricated by reactive magnetron sputtering. Chemical bonding state and the microstructure of the NbAlO layer was measured through X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM), respectively. The compositions of NbAlO were 1:2:5.5, as confirmed through Rutherford backscattering methods. The samples were placed on a cryogenic Lakeshore probe station (Lake Shore Cryotronics, Inc., Westerville, USA) and cooled with nitrogen liquid. The electrical characteristics were measured at increasing temperatures from 80 to 200 K in an interval of 10 K using a Keithley 4200-SCS semiconductor parameter analyzer (Keithley Instruments Inc., Ohio, USA) with the voltage applied on top electrode of TiN while the bottom Pt electrode was grounded. Because of the overshoot phenomenon with a small current compliance , 5 mA was chosen as the current compliance to protect the samples from electrical breakdown during the SET (transition from HRS to LRS) process.
Results and discussion
The conductive filament rupture in RRAM RESET process can be attributed not only to joule heat generated by internal current flow through a filament but also to the charge trap/detrapping effect. A new conduction mode is discussed from hopping conduction to Frenkel-Poole conduction with elevated temperature. This finding will help us understand the physical mechanism of resistive switching deeply in RRAM application.
PZ received his BS degree in Physics and his PhD degree in optics from Fudan University, Shanghai, China, in 2000 and 2005, respectively. He is currently an associate professor in the School of Microelectronics, Fudan University. His research interests include fabrication and characterization of advanced metal-oxide-semiconductor field-effect transistors, advanced memory devices, and graphene device. LY received his BS degree and the MS degree in microelectronics from Fudan University, Shanghai, China, in 2009 and 2012, respectively. He is currently a 28-nm Graphics Design Engineer in Huali Microelectronics Corporation, Shanghai. His research interests include low-power circuit, memory and device design, and fabrication for the cutting edge integrated circuit technology. QQS received his BS degree in Physics and his MS degree in microelectronics and solid state electronics from Fudan University, Shanghai, China, in 2004 and 2009, respectively. He is currently an associate professor in the School of Microelectronics, Fudan University. His research interests include fabrication and characterization of advanced metal-oxide-semiconductor field-effect transistors, mainly high-k dielectric-based devices. He is also interested in design, fabrication, and characterization of advanced memory devices, such as resistive switching memory devices and Flash. PFW received his BS and MS degrees from Fudan University, Shanghai, China, in 1998 and 2001, respectively, and his Ph.D. degree from the Technical University of Munich, München, Germany, in 2003. Until 2004, he was with the Memory Division of the Infineon Technologies in Germany on the development and the process integration of novel memory devices. Since 2009, he has been a professor ins Fudan University. His research interests include design and fabrication of semiconductor devices and development of semiconductor fabrication technologies such as high-k gate dielectrics and copper/low-k integration. AQJ is presently with a professor in the School of Microelectronics, Fudan University. He received his Ph.D. degree in 1999 in Studies of the Nanostructural Materials from the Institute of Solid State Physics, Chinese Academy of Sciences (Hefei). Later, he started his postdoctoral researches in the Institute of Physics (Beijing) (1999 to 2000) and Cambridge University (2001 to 2006). His main researches include nanotechnologies of nonvolative random access memories, such as ferroelectric memory (FeRAM), phase-change memory (PCRAM), resistor memory (RRAM), and Flash memory on the basis of CMOS, as well as the relevant device physics, especially about ferroelectric and semiconductor theories. SJD is a professor in the School of Microelectronics, Fudan University. He received his Ph.D. degree in Microelectronic and Solid State Electronics from Fudan University in July, 2001. From October 2001 to November 2002, he was a Research Fellow of Alexander von Humboldt Foundation with the Department of Materials Science and Engineering, Kiel University in Germany. From February 2003 to December 2004, he was a Research Fellow with the Silicon Nano Device Lab, National University of Singapore. DWZ received his BS, MSc, and Ph.D. degrees in Electrical Engineering from Xi’an Jiaotong University, Xi’an, China, in 1988, 1991, and 1995, respectively. In 1997, he was an associate professor in Fudan University, Shanghai, China, where he has been a full professor since 1999 and is currently the dean of the Department of Microelectronics and the director of the Fudan–Novellus Interconnect Research Center. He has authored more than 200 referred archival publications and is the holder of 15 patents. More than 50 students have received their MSc or Ph.D. degrees under his supervision. His research interests include integrated circuit processing and technology, such as copper interconnect technology, atomic layer deposition of high-k materials, semiconductor materials and thin-film technology; new structure dynamic random access memory (RAM), Flash memory, and resistive RAM; and metal-oxide-semiconductor FET based on nanowire and nanotube and tunneling FET.
This work was supported by the NSFC (61076114), Shanghai Educational Develop Foundation (10CG04), and Innovation Program of Shanghai Municipal Education Commission (12ZZ010).
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