Open Access

Enhanced resistive switching phenomena using low-positive-voltage format and self-compliance IrO x /GdO x /W cross-point memories

  • Debanjan Jana1,
  • Siddheswar Maikap1Email author,
  • Amit Prakash1,
  • Yi-Yan Chen2,
  • Hsien-Chin Chiu1 and
  • Jer-Ren Yang2
Nanoscale Research Letters20149:12

DOI: 10.1186/1556-276X-9-12

Received: 20 November 2013

Accepted: 25 December 2013

Published: 8 January 2014

Abstract

Enhanced resistive switching phenomena of IrO x /GdO x /W cross-point memory devices have been observed as compared to the via-hole devices. The as-deposited Gd2O3 films with a thickness of approximately 15 nm show polycrystalline that is observed using high-resolution transmission electron microscope. Via-hole memory device shows bipolar resistive switching phenomena with a large formation voltage of -6.4 V and high operation current of >1 mA, while the cross-point memory device shows also bipolar resistive switching with low-voltage format of +2 V and self-compliance operation current of <300 μA. Switching mechanism is based on the formation and rupture of conducting filament at the IrO x /GdO x interface, owing to oxygen ion migration. The oxygen-rich GdO x layer formation at the IrO x /GdO x interface will also help control the resistive switching characteristics. This cross-point memory device has also Repeatable 100 DC switching cycles, narrow distribution of LRS/HRS, excellent pulse endurance of >10,000 in every cycle, and good data retention of >104 s. This memory device has great potential for future nanoscale high-density non-volatile memory applications.

Keywords

RRAM GdO x Self-compliance Resistive switching

Background

There is an increasing demand for next-generation high-density non-volatile memory devices because flash memories are approaching their scaling limits. Among many candidates to replace the flash memory devices, resistive random access memory (RRAM) is one of the promising candidates, owing to its simple metal-insulator-metal structure, fast switching speed, low-power operation, excellent scalability potential, and high density in crossbar structure [14]. Many switching materials such as TaO x [57], AlO x [8, 9], HfO x [1015], TiO x [16, 17], NiO x [1821], WO x [22, 23], ZnO x [24, 25], ZrO x [2631], SrTiO3 [32, 33], SiO x [34, 35], and Pr0.7Ca0.3MnO3 [36, 37] have been studied by several groups. However, the rare-earth oxide such as Gd2O3 could be a promising resistive switching material because of its high resistivity, high dielectric permittivity (κ = 16), moderate energy gap (Eg = approximately 5.3 eV), and higher thermodynamic stability [38]. Recently, many researchers have reported the resistive switching properties by using Gd2O3 materials [3840]. Cao et al. [38] have reported unipolar resistive switching phenomena using Pt/Gd2O3/Pt structure with a high RESET current of 35 mA. Liu et al. [39] have also reported unipolar resistive switching phenomena with a high RESET current of 10 mA in Ti/Gd2O3/Pt structure. Yoon et al. [40] have reported resistive switching characteristics using MoO x /GdO x bilayer structure with a RESET current of 300 μA. It is found that non-uniform switching and high overshoot current are the main drawbacks for practical application of non-volatile RRAM using Gd2O3 material. Even though many structures using the Gd2O3 materials have been reported, however, the cross-point memory devices using IrO x /GdO x /W structure have not yet been reported. It is reported [41] that the cross-point structure has a great potential for high-density memory application in the near future.

In this study, we discussed resistive switching phenomena of IrO x /GdO x /W cross-point memory structure. For comparison, the IrO x /GdO x /W via-hole structure has been also investigated. The IrO x /GdO x /W via-hole memory devices exhibit negative switching polarity, whereas the IrO x /GdO x /W cross-point memory devices show positive switching polarity. Switching non-uniformity and high operation voltage/current of the via-hole devices are observed. To improve the switching uniformity and control the current overshoot, we have designed the IrO x /GdO x /W cross-point memory devices. In the cross-point structure, IrO x /GdO x /W memory device shows stable and uniform positive switching due to the formation of oxygen-rich interfacial layer at the IrO x /GdO x interface. The cross-point memory device has self-compliance bipolar resistive switching phenomena of consecutive 100 cycles with narrow distribution of high resistance state (HRS), low resistance state (LRS), good device-to-device uniformity, excellent P/E cycles of >10,000, and good data retention with resistance ratio of 100 after 104 s under a low operation voltage of ±3.5 V.

Methods

First, the cross-point memory devices using the IrO x /GdO x /W structure were fabricated. After conventional RCA cleaning of p-type Si wafer, 200-nm-thick SiO2 was grown by wet oxidation process. Then, a tungsten (W) metal layer of approximately 200 nm was deposited on the SiO2/Si substrate by radio frequency (rf) sputtering process. The deposition power was 150 W, and argon (Ar) with flow rate of 25 sccm was used. The W bars with different widths of 4 to 50 μm were patterned by optical lithography and wet etching process, which serve as bottom electrode (BE). Another lithography process step was used to obtain top electrode bar (TE) by lift-off. The high-κ Gd2O3 as a switching material was deposited by electron beam evaporation. The thickness of the Gd2O3 film was approximately 15 nm. Pure Gd2O3 shots with granules sizes of 2 to 3 mm were used. The deposition rate of Gd2O3 was 0.2 Å/s, and the power was 400 W. Then, iridium-oxide (IrO x ) as a TE with a thickness of approximately 200 nm was deposited by rf sputtering. An iridium (Ir) target was used for the IrO x TE. The ratio of Ar to O gases was 1:1 (i.e., 25/25 sccm). The deposition power and chamber pressure were 50 W and 20 mTorr, respectively. The Ir bars with different widths of 4 to 50 μm were laid 90° with W BEs. Finally, lift-off was performed to get the final devices with different sizes of 4 × 4 to 50 × 50 μm2. Then, the device was annealed at 400°C in N2 ambient for 10 min. The N2 pressure was 5 SLM. The cross-point memories with different arrays of 1 × 1 to 10 × 10 were designed, and the memory device at the 1 × 1 position was measured in this study. Figure 1 shows a schematic view of our IrO x /GdO x /W cross-point memory device. Figure 2 shows the topography of the Gd2O3 and IrO x films, observed using atomic force microscope (AFM). AFM images of two-dimensional (2D) format are shown in Figure 2a,c, and three-dimensional (3D) images are shown in Figure 2b,d. The root mean square (rms, Rq) and average (Ra) surface roughness are found to be 0.688 and 0.518 nm of the Gd2O3 film on Si substrate, while those values are found to be 1.29 and 1.03 nm of the IrO x film on Gd2O3/SiO2/Si substrate, respectively. For comparison, we have also studied the surface roughness of W BE for the via-hole and cross-point memory devices. The root mean square (Rq) surface roughness of W BE for the via-hole and cross-point devices is found to be 1.35 and 4.21 nm, and the average surface roughness (Ra) is found to be 1.05 and 3.35 nm, respectively [42]. It is observed that the surface roughness of W BE is higher than those of GdO x and IrO x , which might have great impact on W BE as well as improved resistive switching characteristics.
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Figure 1

Schematic view of IrO x /GdO x /W cross-point memory device. Positive bias is applied at the TE, and BE was grounded during the measurement.

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Figure 2

AFM images of the films. GdO x film on SiO2/Si substrate in (a) 2D and (b) 3D views. IrO x film on IrO x /GdO x /SiO2/Si stack in (c) 2D and (d) 3D views.

Second, the via-hole devices were fabricated for comparison. The fabrication steps are as follows. The W metal as a BE was deposited by rf sputtering on SiO2 (200 nm)/Si wafers. In this device, the thickness of W layer was approximately 100 nm. To form the RRAM device, the SiO2 layer with a thickness of approximately 150 nm was deposited. Then, a small via-hole with an active area of 2 × 2 μm2 was designed using standard lithography. Photoresist (PR) was used to design the pattern and was opened at the active and TE regions. Then, the Gd2O3 film with a thickness of 15 nm was deposited. Finally, lift-off was performed to get the memory device. A schematic view of our IrO x /GdO x /W via-hole structure is shown in Figure 3. During electrical measurement of the memory devices, the BE was grounded and the sweeping bias was applied on the TE.
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Figure 3

Schematic view of resistive switching memory device in an IrO x /GdO x /W via-hole structure. Typical device size is 2 × 2 μm2.

Results and discussion

Figure 4a shows the HRTEM image of our memory device for the as-deposited Gd2O3 film. Each layer is shown. The thickness of the GdO x layer is approximately 15 nm. To identify the crystalline nature of the Gd2O3 film, the calculated d spacings are found to be 2.78 Å (101), 2.91 Å (002), and 3.06 Å (100), which are similar (2.69 Å (200), 3.09 Å (111), and 1.89 Å (220)) to those reported in the literature [43]. This suggests that this as-deposited Gd2O3 film is polycrystalline. The energy diffraction X-ray spectroscopy (EDX) spectra confirm the presence of expected elements Ir, Gd, W, and O in respective layers, as shown in Figure 4b. The X-ray photoelectron spectroscopy (XPS) spectra of Gd 3d5/2 and Gd2O3 3d5/2 peaks are located at 1,186.73 and 1,189 eV, respectively (Figure 5), which proves a Gd-rich Gd2O3 film, i.e., GdO x . The height ratio of Gd/Gd2O3 is 1:0.93, and area ratio of Gd/Gd2O3 is 1:0.89. Arhen et al. [44] reported the same chemical bonding states at 1,186 and 1,188 eV for the Gd 3d5/2 and Gd2O3 3d5/2 peaks, respectively. This suggests that the as-deposited Gd2O3 film is a Gd-rich GdO x film. It is known that the grain boundary has more defects or weak Gd-O bonds. This suggests that the Gd-O bonds will break easily under external bias, and more oxygen vacancies will be created. The conducting filament will be formed through the grain boundaries. However, the nanotips on the W BE will help the structure have repeatable resistive switching memory characteristics.
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Figure 4

TEM image and EDX spectra. (a) Cross-sectional TEM image of IrO x /GdO x /W structure. Polycrystalline GdO x film is observed. (b) EDX spectra show the Ir, Gd, W, and O elements.

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Figure 5

XPS characteristics of the Gd 2 O 3 films. XPS spectra of the Gd 3d and Gd2O3 3d core-level electrons.

Figure 6a shows the typical current–voltage (I-V) characteristics of a IrO x /GdO x /W RRAM device in via-hole structure, as illustrated schematically in Figure 3. The pristine device shows very low leakage current (arrow 1). In order to activate the resistive switching, an initial soft breakdown process (forming) was carried out by applying negative bias on the TE. The negative forming voltage (Vform) is -6.4 V to initiate the resistive switching with a current compliance (CC) of 100 μA. During the formation process, the Gd-O bonds break, which creates oxygen vacancy as well as oxygen vacancy filament, and set LRS. In consequence, the oxygen ions (O2–) will be migrated toward the W BE and react partially at the BE. Bipolar I-V characteristics are indicated by arrows 2 to 4. The SET (VSET) and RESET voltages (VRESET) are found to be -2.2 and +2 V, respectively. To elucidate the conduction mechanism of the IrO x /GdO x /W memory device, the I-V curves are plotted in log-log scale, as shown in Figure 6b. Both LRS and HRS show ohmic conduction behaviors with a slope approximately 1.1. The LRS is ohmic because of the conducting filament formation in the GdO x layer. The HRS is also ohmic because the electrons move through the defects of the GdO x grain boundary. The ohmic behavior of the HRS was also reported by Jung et al. [45]. The resistive switching mechanism can be explained as follows. When negative bias is applied on the TE, the oxygen ions will move from the GdO x layer to the WO x layer. Then, the oxygen vacancy filament will form in the GdO x layer, and the device switches to LRS, which is shown schematically in Figure 6c. The conducting filament will be ruptured by applying positive bias on the TE, and the device switches to HRS, as shown in Figure 6d. In this case, the O2– ions will move from the WO x layer toward the GdO x layer and oxidize the conducting filament. Basically, the conducting filament formation/rupture is due to the oxygen ion migration. This via-hole memory device has read pulse endurance of >105 cycles and good data retention at 85°C (not shown here). Both the LRS and HRS with a high resistance ratio of >103 can be retained after 104 s at 85°C. It is indicating that the memory device is non-volatile and stable at 85°C. However, this device operation current is high (>1 mA), and the I-V switching cycles has variation. This indicates that the via-hole device in an IrO x /GdO x /W structure needs high current operation and that multiple conducting filaments could be formed, which is difficult to control the repeatable switching, and it is also against the future application of nanoscale non-volatile memory. To resolve this issue, we have fabricated the cross-point memory device using the same IrO x /GdO x /W structure, and the improved memory characteristics are observed below.
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Figure 6

I - V switching characteristics and mechanism. (a) I-V characteristics for formation process and bipolar resistive switching characteristics of the via-hole devices, (b) I-V fitting, (c) oxygen vacancy filament formation under - V < VSET, and (d) filament ruptured or oxidized under + V > VRESET.

Figure 7a shows self-compliance bipolar current–voltage characteristics of our cross-point memory device. Initially, the memory device was in HRS or initial resistance state (IRS). Therefore, the first switching cycle of the memory device shows like formation with small forming voltage (Vform) +2 V, which is comparatively very lower than the via-hole device (-6.4 V) as shown in Figure 6a. This suggests that extra forming step is not required in our cross-point device if it is operated within ±3 V, which is very useful for practical realization because of its cost effectiveness and reduction of circuit complexity. The cross-point memory device exhibits Repeatable 100 cycles with small operating voltage of ±3 V, has a low-positive-voltage format, and has a self-compliance with a low current approximately 300 μA at a voltage of ±2 V. Both SET and RESET currents are almost the same, which indicates a good current clamping between the TE and BE in the switching material. To identify the current conduction mechanism, the I-V curve was fitted in the log-log scale, as shown in Figure 7b. The slope values of LRS are 1.3 (I αV1.3) and 1.9 (I αV1.9) at low- and high-voltage regions, respectively, whereas the slope values of HRS are 2.3 (I αV2.3) and 4.3 (I αV4.3) at low- and high-voltage regions, respectively. This suggests that the conduction mechanism for both LRS and HRS is trap-controlled space charge-limited current conduction mechanism (TC-SCLC). The switching mechanism is based on the formation and rupture of the conducting filament at the IrO x (TE)/GdO x interface, depending upon the electrical bias. By applying negative bias on the TE of the IrO x /GdO x /W via-hole devices, the O2– ions drift toward the W BE and partially oxidize, as well as sink into the W BE. Due to the presence of huge numbers of oxygen vacancies into the GdO x layer, there is much possibility to form multiple filaments resulting in non-uniform resistive switching. This phenomenon was also observed for IrO x /TaO x /W structure [46]. By applying positive bias on the IrO x /GdO x /W via-hole devices, the O2– ions migrate toward the IrO x TE. Due to the porous nature of IrO x , some O2– ions drift out and some oxygen are gathered at the IrO x /GdO x interface. The porous IrO x film was also reported recently [47]. Oxygen-rich GdO x layer at the GdO x /TE interface acts as a series resistance which restricts the overshoot current and makes the filament uniform. This interfacial series resistance helps achieve a repeatable switching cycle; however, few devices are controllable. On the other hand, a cross-point memory device does not exhibit switching under negative bias on the IrO x TE, owing to higher resistivity of thinner IrO x TE, and the device cannot reach a higher operating current. However, the cross-point memory device exhibits excellent resistive switching characteristics under positive bias on the IrO x TE due to both the rough surface of the W BE and oxygen gathering at the IrO x /GdO x interface. The electric field enhancement on the nanotips of the W BE and the interfacial series resistance of IrO x /GdO x with thinner layer IrO x TE help the structure have controllable resistive switching characteristics. Owing to the structural shape and the W BE surface differences, the cross-point memory devices have low-positive-voltage format, repeatable switching cycles, and self-compliance, and have improved switching characteristics than the via-hole devices. The similar phenomena was also reported recently [48]. However, further study is ongoing to understand the different resistive switching characteristics between the via-hole and cross-point memory devices. To check the uniformity of the cross-point memory devices, the statistical distribution of IRS, HRS, and LRS were randomly measured in more than 20 devices, as shown in Figure 8. Some devices are not switchable, which may be due to process variation from our deposition system. Most of the memory devices exhibit good distribution of IRS, HRS, and LRS. The average values (σm) of IRS, HRS, and LRS are found to be 29.44G Ω, 9.57 MΩ, and 14.87 kΩ, and those values for standard deviation (σs) are 89.47, 7.21, and 6.67, respectively. This suggests that the memory device has great potential for high-density memory application. Excellent program/erase (P/E) of >10,000 cycles is manifested in our IrO x /GdO x /W cross-point memory device, as shown in Figure 9a. Every cycle was measured during the measurement. The program and erase voltages were +3.5 and -2.5 V, respectively, as shown schematically in the inset of Figure 9a. After 104 P/E cycles, the memory device maintain a resistance ratio of approximately 10 which is also acceptable for multilevel cell operation. Good data retention of >104 s is observed, as shown in Figure 9b. Both HRS and LRS were read out at +0.2 V. A large resistance ratio of approximately 100 is maintained after 104 s. This cross-point memory device paves a way in future nanoscale high-density non-volatile memory.
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Figure 7

Self-compliance I - V switching characteristics and fitting. (a) Self-compliance Repeatable I-V hysteresis loop of our IrO x /GdO x /W cross-point memory devices. A low operation voltage of ±3 V is applied to get repeatable resistive switching characteristics. (b) Fitted I-V curve in a log-log scale. Both LRS and HRS show trap-controlled space charge-limited current conduction mechanism.

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Figure 8

Statistical distribution of resistances. Statistical distribution of IRS, HRS, and LRS of the IrO x /GdO x /W cross-point memory device.

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Figure 9

AC endurance and data retention characteristics. (a) Good AC endurance of more than 10,000 in every cycle of cross-point resistive switching memory device. Both resistances were read out at +0.2 V. (b) Good data retention characteristics of >104 s is obtained.

Conclusions

Enhanced resistive switching characteristics using the IrO x /GdO x /W cross-point memory structure have been obtained. The HRTEM image shows a polycrystalline structure of the GdO x films. The switching mechanism is based on the formation and rupture of the conducting filament by oxygen ion migration, and the oxygen-rich GdO x layer formation at the IrO x /GdO x interface acts as a series resistance to control the current overshoot effect and improves the switching uniformity as compared to the via-hole devices. The cross-point memory device shows self-compliance bipolar resistive switching phenomena of consecutive 100 cycles with narrow distribution of LRS and HRS, excellent P/E cycles of >10,000, and good data retention of >104 s with resistance ratio >102 under low operation voltage of ±3 V. This memory device paves a way for future nanoscale high-density non-volatile memory applications.

Authors’ information

DJ is a Ph.D. student since September 2010, and AP has received his Ph.D. degree on July 2013 under the instruction of Professor SM. SM has been an Associate Professor in the Department of Electronic Engineering, Chang Gung University since August 2009. YYC is a Ph.D. student in the Department of Materials Science and Engineering, National Taiwan University, under the instruction of Professor JRY. HCC has been a Professor in the Department of Electronic Engineering, Chang Gung University since August 2010.

Declarations

Acknowledgements

This work was supported by the National Science Council (NSC) of Taiwan, under the contract no. NSC-102-2221-E-182-057-MY2.

Authors’ Affiliations

(1)
Thin Film Nano Technology Laboratory, Department of Electronic Engineering, Chang Gung University
(2)
Department of Materials Science and Engineering, National Taiwan University

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© Jana et al.; licensee Springer. 2014

This article is published under license to BioMed Central Ltd. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.