To prepare high-density integrated capacitors with low leakage currents, 0.2-μm-thick BaTiO3 thin films were successfully deposited on integrated semiconductor substrates at room temperature by the aerosol deposition (AD) method. In this study, the effects of starting powder size were considered in an effort to remove macroscopic defects. A surface morphology of 25.3 nm and an interface roughness of less than 50 nm were obtained using BT-03B starting powder. The nano-crystalline thin films achieved after deposition were annealed at various temperatures to promote crystallization and densification. Moreover, the influence of rapid thermal annealing process on the surface morphology and crystal growth was evaluated. As the annealing temperature increased from room temperature to 650°C, the root mean square (RMS) roughness decreased from 25.3 to 14.3 nm. However, the surface was transformed into rough performance at 750°C, which agreed well with the surface microstructure trend. Moreover, the crystal growth also reveals the changes in surface morphology via surface energy analysis.
Recently, to meet the modern communication system demands of miniaturization and high frequency, high-density integrated capacitors have attracted increasing industry interest, which has been driven by thin-film integrated passive devices (IPDs) [1–3], electromagnetic interference (EMI) protection , high-electron-mobility transistor (HEMT) input-/output-matching circuit blocks , and digital and mixed signal applications . Several semiconductor technologies, such as low-temperature co-firing ceramics (LTCC)  and sputtering , can be used to fabricate materials with high relative permittivity. However, both LTCC and sputtering need sintering at approximately 850°C to form the desired crystallite structure, which is a critical problem for embedding passive devices. Consequently, a new, green, and environmentally friendly approach called aerosol deposition (AD), which can deposit ceramic films at room temperature, has attracted great interest. The pioneering work was published in 2001 , and various ceramic films fabricated by AD have been studied quite intensively in recent years.
In previous research, ferroelectric BaTiO3 was employed in high-density embedded decoupling capacitors using the AD method. BaTiO3 films with thicknesses of 0.1 to 2.2 μm were deposited on Cu and stainless steel (SUS) substrates [10–13]. The BaTiO3 films with a thickness of less than 0.5 μm on Cu substrates and 0.2 μm on SUS substrates exhibited conductor properties because of their high leakage currents. The leakage current mechanisms for aerosol-deposited BaTiO3 thin films and the causes of the high leakage currents were determined in previous research [10, 12]. However, the densification mechanism of BaTiO3 films deposited by AD has yet to be identified.
In this study, we applied 0.2-μm-thick BaTiO3 thin films deposited by AD onto an integrated substrate suitable for thin-film IPDs. To overcome the macroscopic defects and rough interface between the BaTiO3 films and substrates, the influence of starting powders with difference particle sizes was investigated by scanning electron microscopy (SEM) and focused ion beam (FIB). In addition, the densification of AD-deposited BaTiO3 thin films and stronger particle-to-particle bonding could be obtained using rapid thermal annealing treatment. The surface morphology of post-annealed BaTiO3 thin films was examined using atom force microscopy (AFM) to reveal the effect of rapid thermal annealing (RTA) treatment on leakage currents.
The AD method is a very attractive deposition process for integrating ceramic thin films. During the deposition process, the raw particles are mixed with a N2 carrier gas to form an aerosol flow and then ejected through a nozzle and coated onto the substrate in the deposition chamber at room temperature. The detailed fabrication apparatus has been described in elsewhere . The BaTiO3 thin films were successfully deposited on Pt/Ti/SiO2/Si integrated substrates with a thickness of 200 nm and a deposition area of 10 × 10 mm2 using a similar AD apparatus in this paper. The thickness of the Pt/Ti layer is 150/10 nm. During the deposition process, to clarify the influence of the starting powder on the morphology of the bottom Pt interface, different BaTiO3 powders BT-045J and BT-03B (Samsung Fine Chemicals Co., Ltd., Ulsan, South Korea) with particle sizes of 0.45 and 0.30 μm, respectively, were used as starting powders. The surfaces of the as-deposited thin films were evaluated using SEM (S-4300SE; Hitachi Ltd, Tokyo, Japan), and the cross-section of the interface between the BaTiO3 thin films and Pt substrate deposited using different starting powders was observed using a FIB system (Nova 600 Nanolab, FEI, Hillsboro, OR, USA).
To enhance the crystal growth, the as-deposited thin films were annealed for 60 s in N2 ambient by RTA (KVR-3006 T, Korea Vacuum Tech., Gyeonggi, South Korea). The annealing temperature was varied between 550°C and 750°C in 100°C steps. Figure 1 schematically shows the fabrication process. After RTA treatment, the post-annealed thin films were analyzed by X-ray diffraction (XRD; ATX-G, Rigaku, Tokyo, Japan) using Cu Kα radiation (λ = 0.154 nm) with a power of 18 kW. Moreover, the surface morphology of the post-annealed samples was measured by AFM (XE-100, PSIA Co., Sungnam, South Korea).
Results and discussion
In our previous work, BaTiO3 films of 0.1 to 2.2 μm in thickness were deposited on Cu and SUS substrate by the AD method. All of the samples with thicknesses of less than 0.5 μm on Cu substrates and 0.2 μm on SUS substrates were electrically shorted, which can be a result of high leakage currents caused by macroscopic defects and rough interfaces between films and substrates .
In this study, 0.2-μm-thick BaTiO3 films were fabricated on platinum-coated silicon substrates to apply the AD-deposited BaTiO3 thin films in integrated high-K metal-isolator-metal capacitors. Figure 2a,b shows the SEM images of the surface morphologies of BaTiO3 thin films fabricated on platinum-coated substrate using BT-045J and BT-03B starting powders, respectively. As shown in Figure 2a, macroscopic defects such as craters and incompletely crushed particles were observed, which were considered to be one of the main causes of the high leakage currents. In contrast, BaTiO3 thin films deposited using BT-03B starting powder exhibited a dense surface structure with fewer craters and large particles. It was confirmed that the small starting powder could produce a smoother surface with fewer craters and incompletely crushed particles, thereby decreasing the leakage current .
Interface between BaTiO3 thin films and substrates
Previous studies, such as  and , only address the interface between films and Cu or SUS substrate with a minimum interface roughness of 50 to 100 nm. When BaTiO3 thin films thickness decreases to less than 200 nm, it would cause a high field concentration, bringing about high leakage currents. In this study, the effect of starting powder size on the interface roughness was demonstrated by FIB. The interface between the films deposited by BT-045J starting powder and the substrates, as shown in Figure 3a, was very rough compared with that using BT-03B starting powder, as shown in Figure 3b. The interface roughness of the films deposited using BT-045J was approximately 70 nm, compared with a roughness of less than 50 nm for the films deposited using BT-03B. These results indicate that larger particles with greater kinetic energy roughen the platinum thin films on the silicon substrates much more severely during impact with the substrates. Thus, interface between the films deposited by BT-045J was rougher than that obtained using BT-03B starting powder.
Effect of rapid thermal annealing on surface morphology and crystal growth
Based on the above-mentioned statement, the macroscopic defects and rough interface effect could be ameliorated by means of BT-03B starting powder to reduce the leakage current. However, it was difficult to form dense films using small particles with weak particle-to-particle bonding as the starting powder . Therefore, we apply RTA treatment in this study and investigate the effects of RTA processing on the surface morphology of AD-deposited BaTiO3 thin films. Figure 4 shows 10 × 10 μm2 AFM images of 2-D views, 3-D views, and selected area surface profiles of the as-deposited films fabricated by BT-03B starting powder (a) and the post-annealed films processed at different temperatures: 550°C (b), 650°C (c), and 750°C (d). Comparing Figure 4a,b,c, which presents 3-D views of the film surface morphology, it can be noted that the surface becomes smoother and the RMS value decreases as the RTA temperature increases from room temperature to 650°C. In contrast, Figure 4d reveals that the RMS value increased and agglomerates were present on the surface. Moreover, the line profiles of the selected area are shown in Figure 4 (a-2) to (d-2), which indicated the change in both the diameter and depth of the craters on the surface, which follow the trend in Figure 4a,b,c,d. Figure 4 (a-2) shows the craters on the as-deposited films, which have a diameter of 1.2 μm and a depth of 58.5 nm, and the smaller craters observed after RTA treatment at 650°C, which have a diameter of 0.7 μm and a depth of 27.5 nm. However, as shown in Figure 4 (d-2), at 750°C, larger craters with a diameter of 1.3 μm and a depth of 60.2 nm appeared on the surface of the thin film. It was implied that the low surface roughness achieved at 650°C may be due to the microstructure on the surface.
To explain this finding, the crystal structure was analyzed by XRD to confirm the crystal growth after RTA treatment. As the temperature increased from room temperature to 750°C, all of the XRD profiles, as shown in Figure 5a, confirmed that both the as-deposited and post-annealed BaTiO3 thin films have a cubic phase with a single perovskite structure . Figure 5b shows an enlargement of the 110 main peak of the as-deposited BaTiO3 thin films and post-annealed thin films at various temperatures. It can be noted that the spectral peaks do not shift in position but do broaden. Moreover, the crystallite size of AD-deposited BaTiO3 thin films on platinum-coated substrates at room temperature calculated by Scherrer's equation was 11.3 nm. After post-annealing at 550, 650, and 750°C, the crystallite sizes were 14.5, 16.3, and 17.5 nm, respectively. Similar phenomenon was reported by Kim et al.  for BaTiO3 films sintered at 800, 900, and 1,000°C. Combined with the surface morphology after RTA, this finding can be explained by surface energy theory as follows . After the RTA treatment, the surface energy would be reduced by combining individual particles into a bulk with a solid interface to enhance the particle-to-particle bonding. As the RTA temperature increased from room temperature to 650°C, volume diffusion dominates the annealing process, resulting in densification and removal of the pores in bulk films. Therefore, a smoother surface morphology and reduction in crater diameter were observed during this process. However, when the annealing temperature was 750°C, cross grain boundary diffusion became significant, leading to a change in surface roughness and microstructure.
In this study, BaTiO3 thin films with thickness of 0.2 μm were deposited on platinum-coated silicon substrates at room temperature by AD. Different thin films deposited using starting powders of various sizes were investigated, and the results confirmed that the macroscopic defects such as pores and incompletely crushed particles could be reduced by employing BT-03B starting powder. An interface roughness of less than 50 nm and a minimum surface roughness of 14.3 nm were obtained after RTA treatment at 650°C. As the annealing temperature increased from room temperature to 650°C, the calculated crystalline size increased from 11.3 to 16.3 nm. Thus, the surface morphology and the densification of AD-deposited BaTiO3 thin films can be controlled by appropriate choice of RTA temperature to achieve a low leakage current.
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIP) No. 2013-067321 and a grant supported from the Korean government (MEST) No. 2012R1A1A2004366 and (MSIP) No.2014R1A1A1005901. This work was also supported by a Research Grant of Kwangwoon University in 2014. Also, we would like to thank Mr. Ho-Kun Sung from Korea Advanced Nano Fab Center (KANC) for his technical support with the materials and circuit fabrications during this work.
Department of Electronic Engineering, Kwangwoon University
Department of Electronic Materials Engineering, Kwangwoon University
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