Strained Germanium Quantum Well PMOSFETs on SOI with Mobility Enhancement by External Uniaxial Stress
© The Author(s). 2017
Received: 21 December 2016
Accepted: 10 February 2017
Published: 16 February 2017
Well-behaved Ge quantum well (QW) p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) were fabricated on silicon-on-insulator (SOI) substrate. By optimizing the growth conditions, ultrathin fully strained Ge film was directly epitaxially grown on SOI at about 450 °C using ultra-high vacuum chemical vapor deposition. In situ Si2H6 passivation of Ge was utilized to form a high-quality SiO2/Si interfacial layer between the high-κ dielectric and channels. Strained Ge QW pMOSFETs achieve the significantly improved effective hole mobility μ eff as compared with the relaxed Si and Ge control devices. At an inversion charge density of Q inv of 2 × 1012 cm−2, Ge QW pMOSFETs on SOI exhibit a 104% μ eff enhancement over relaxed Ge control transistors. It is also demonstrated that μ eff of Ge pMOSFETs on SOI can be further boosted by applying an external uniaxial compressive strain.
KeywordsGermanium MOSFET Mobility Quantum well
Germanium (Ge) has been attracting tremendous research interests for future pMOSFET applications due to it possesses the higher hole mobility over Si. Theoretical and experimental results proved that in order for Ge channel transistors to have significantly improved mobility and driving current over their Si and SiGe channel competitors, compressive strain is essential [1–3]. A great deal of efforts were devoted to demonstrating biaxially strained Ge-based ultrathin quantum well (QW) pMOSFETs [2, 4, 5], which have exhibited the advantages of confining hole in the undoped quantum well, eliminating dopant impurity scattering, and accommodating very high strain in channel. Nonetheless, the development of defect-free SiGe buffer with smooth surface on Si raised a major challenge for Ge devices. It was reported that, by optimizing the growth condition and controlling the film thickness precisely, fully strained Ge channel could be pseudomorphically grown directly on Si and silicon-on-insulator (SOI) [6–8]. With the low thermal budget device fabrication process, the strain in channel region was maintained, which substantially boosted the transistor performance. Studies showed that the uniaxial compressive strain is also promising for improving the mobility of Ge pMOSFETs [9–11]. However, there is still lack of the study on the combination effects between uniaxial and biaxial strain on Ge pMOSFETs.
In this paper, ultrathin strained Ge QW pMOSFETs on SOI are realized and characterized. Devices achieve the superior hole mobility to the relaxed Si and Ge control transistors. Electrical performance of Ge QW transistors is further improved by applying the external uniaxial compressive strain being parallel to channel direction.
Figure 2b shows the cross-sectional schematic of a fabricated Ge pMOSFET. Figure 2c depicts the high-resolution transmission electron microscope (HRTEM) image of metal gate stack on strained Ge channel on SOI. The thicknesses of defect-free Ge channel and HfO2 dielectric layer are 3.7 and 4.0 nm, respectively. Excellent interface quality and a uniform SiO2/Si interfacial layer (IL) are observed.
Flexure-Based Bending Setup
Before measurement, the handle Si of SOI wafer was thinned down to about 300 μm by back side polishing to make sure it can accommodate the large strain. The values of Young’s modulus for Ge along  direction is 138 GPa .
Results and Discussion
High-mobility strained Ge QW pMOSFETs with high channel crystallinity on SOI platform are realized. Devices exhibit good transfer and output characteristics and a significantly improved μ eff over Si and Ge control pMOSFETs. Ge QW pMOSFETs on SOI obtain a 104% improvement in μ eff in comparison with the relaxed Ge control transistors at a fixed Q inv of 4 × 1012 cm−2. Ge QW pMOSFETs on SOI under an external uniaxial compressive stain achieve a further μ eff enhancement, contributing to the reduced R ch and the improved drive current over the transistors without external uniaxial compressive stain.
The authors acknowledge support from the National Natural Science Foundation of China (Grant No. 61534004, 61622405, and 61604112).
YL, HW, and GH carried out the experiments and drafted the manuscript. CZ, QF, JZ, and YH provided constructive advice in the drafting. JN gave kind suggestions about the experiment. GH and YL conceived the study and participated in the experiment design. All the authors read and approved the final manuscript.
The authors declare that they have no competing interests.
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- Hashemi P, Chern W, Lee H–S, Teherani JT, Zhu Y, Gonsalvez J, Shahidi GG, Hoyt JL (2012) Ultrathin strained-Ge channel P-MOSFETs with high-/metal gate and sub-1-nm equivalent oxide thickness. IEEE Electron Device Lett 33(7):943–945View ArticleGoogle Scholar
- Pillarisetty R, Chu-Kung B, Corcoran S, Dewey G, Kavalieros J, Kennel H, Kotlyar R, Le V, Lionberger D, Metz M, Mukherjee N, Nah J, Rachmady W, Radosavljevic M, Shah U, Taft S, Then H, Zelick N, and Chau R (2010) High mobility strained germanium quantum well field effect transistor as the P-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture, Electron Devices Meeting (IEDM), IEEE International 6.7. 1–6.7. 4.
- Ghosh B, Fan XF, Register LF, Banerjee SK (2006) Monte Carlo study of strained Germanium Nanoscale bulk pMOSFETs. IEEE Trans Electron Devices 53(3):533–537View ArticleGoogle Scholar
- Witters L, Mitard J, Loo R, Demuynck S, Chew SA, Schram T, Tao Z, Hikavyy A, Sun JW, Milenin AP, Mertens H, Vrancken C, Favia P, Schaekers M, Bender H, Horiguchi N, Langer R, Barla K, Mocuta D, Collaert N, Thean AV-Y (2015) Strained germanium quantum well p-FinFETs fabricated on 45 nm Fin pitch using replacement channel, replacement metal gate and germanide-free local interconnect. Symp VLSI Technol IEEE 2015:T56–T57Google Scholar
- Han G, Wang Y, Liu Y, Zhang C, Feng Q, Liu M, Zhao S, Cheng B, Zhang J, Hao Y (2016) GeSn quantum well P-channel tunneling FETs fabricated on Si (001) and (111) with improved subthreshold swing. IEEE Electron Device Lett 37(6):943–945Google Scholar
- Hsu C-C, Tsai Y-H, Chen C-W, Li J-H, Lin Y-H, Lee Y-J, Luo G-L, Chien C-H (2016) High-performance Schottky contact quantum-well germanium channel pMOSFET with low thermal budget process. IEEE Electron Device Lett 37(1):8–11View ArticleGoogle Scholar
- Krishnamohan T, Krivokapic Z, Uchida K, Nishi Y, Saraswat KC (2006) High-mobility ultrathin strained Ge MOSFETs on bulk and SOI with low band-to-band tunneling leakage: experiments, IEEE trans. IEEE Trans Electron Devices 53(5):990–999View ArticleGoogle Scholar
- Peng CY, Yuan F, Lee MH, Yu C-Y, Maikap S, Liao MH, Chang ST, Liu CW (2005) Novel schottky barrier strained germanium PMOS. Int Semiconductor Device Res Symp 2005:84–85Google Scholar
- Weber O, Irisawa T, Numata T, Harada M, Taoka N, Yamashita Y, Yamamoto T, Sugiyama T, Takenaka M, Takagi S (2007) Examination of additive mobility enhancements for uniaxial stress combined with biaxially strained Si, biaxially strained SiGe and Ge channel MOSFETs. IEEE Int 2007:719–722, Electron Devices Meeting (IEDM)Google Scholar
- Kim R, Avci UE, Young IA (2015) CMOS performance benchmarking of Si, InAs, GaAs, and Ge nanowire n- and pMOSFETs with Lg = 13 nm based on atomistic quantum transport simulation including strain effects. IEEE Int 2015:34.1.1–34.1.4, Electron Devices Meeting (IEDM)Google Scholar
- Ikeda K, Moriyama Y, Kamimuta Y, Ono M, Irisawa T, Oda M, Kurosawa E, Tezuka T (2013) Advantage of (001)/<100 > oriented channels in biaxially- and uniaxially strained-Ge-on-insulator pMOSFETs with NiGe metal source/drain. IEEE Int 2013:26.2.1–26.2.4, Electron Devices Meeting (IEDM)Google Scholar
- Suthram S, Ziegert JC, Nishida T, Thompson SE (2007) Piezoresistance coefficients of (100) silicon nMOSFETs measured at low and high (∼1.5 GPa) channel stress. IEEE Electron Device Lett 28(1):58–61View ArticleGoogle Scholar
- Adachi S (2009) Properties of semiconductor alloys: group-IV, III-V and II-VI semiconductors [M]. Wiley, Chichester
- Liu M, Han G, Liu Y, Zhang C, Wang H, Li X, Zhang J, Cheng B, Hao Y (2014) Undoped Ge0.92Sn0.08 quantum well PMOSFETs on (001), (011) and (111) substrates with in situ Si2H6 passivation: high hole mobility and dependence of performance on orientation. Symp IEEE 2014:1–2, VLSI TechnologyGoogle Scholar
- Fischetti MV, Laux SE (1996) Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys. J Appl Phys 80:2234View ArticleGoogle Scholar