Electronic Structure and Charge-Trapping Characteristics of the Al2O3-TiAlO-SiO2 Gate Stack for Nonvolatile Memory Applications
© The Author(s). 2017
Received: 29 November 2016
Accepted: 30 March 2017
Published: 13 April 2017
In this work, high-k composite TiAlO film has been investigated as charge-trapping material for nonvolatile memory applications. The annealing formed Al2O3-TiAlO-SiO2 dielectric stack demonstrates significant memory effects and excellent reliability properties. The memory device exhibits a large memory window of ~2.6 V under ±8 V sweeping voltage, and it shows only ~14% charge loss after more than 10 years’ retention, indicating excellent charge retention properties. The electronic structures of the Al2O3-TiAlO-SiO2 have been studied by X-ray photoelectron spectroscopy measurements, and it reveals that the quantum well and the defect traps in TiAlO film can provide a >1.8 eV deep barrier for charge confinement in the TiAlO layer. The mixing between Al2O3 and TiO2 can increase the defects related to the under-coordinated Ti3+ atoms, thereby enhancing the charge-trapping efficiency of the device. Our work implies that high-k TiAlO composite film is promising for applications in future nonvolatile charge-trapping memories.
KeywordsCharge trapping Nonvolatile memory High-k dielectrics TiAlO
Among the family of nonvolatile flash memories, charge-trapping memory (CTM) devices such as silicon-oxide-nitride-oxide-silicon (SONOS)-type memory device receive a lot of attention due to its low-operating voltage, fast program/erase (P/E) speed, good endurance, and retention characteristics over the floating-gate devices [1–3]. For these advantages, SONOS-type CTM device has been considered as a promising candidate for the next-generation nonvolatile flash memory. However, some performance and reliability issues such as low charge-trapping efficiency and poor retention characteristics still exist in SONOS-type CTM devices with the continual scaling. To overcome these disadvantages, various charge-trapping materials as well as blocking and tunneling materials were extensively investigated. Among which, high-k materials including thin films and their nanocrystals, for example HfO2, TiO2, and ZrO2, have been proposed as the charge-trapping layer in the CTM devices to achieve better storage performance and retention characteristics [4–7]. In these high-k dielectrics, oxygen vacancy is verified as the main origin of the defects in the film . Depending on the crystal structure and method of deposition , TiO2 has a high permittivity of 80–110, which is favorable for low-voltage operation of the memory device. Another feature of TiO2 is that Ti has several stable oxidation states of Ti3+ and Ti4+, which leads to a well-known phenomenon with materials containing Ti-O bonds: a reduced oxide. Such a reduced oxide has many oxygen vacancies, which can act as charge-trapping centers . Therefore, it is expected that TiO2 will be a good candidate used as the charge-trapping material, which can provide high charge-trapping ability as well as low device operation voltage. However, TiO2 does not have good insulating quality due to a small bandgap and low crystallization temperature , which is not favorable for long-term stability of the memory device. Alumina (Al2O3) has a large bandgap (~8.7 eV) and large band offsets with Si substrate [9, 11–14] and is amorphous up to high temperatures. The drawback of Al2O3 is that it only has a k ~ 8–10 , which is not favorable for the huge reduction of the operation voltage. Therefore, it is expected that the composite film of TiAlO may combine the advantages of TiO2 and Al2O3, which can have high charge-trapping ability, high permittivity, high thermal stability, and low leakage current at the same. Compared with the commonly studied charge-trapping materials like metal nanocrystals or monophasic high-k layer, the above mentioned advantages of TiAlO composite film show potentially more favorable for the high-performance operation in the future charge-trapping flash memory devices.
In this work, we first fabricated the high-k Al2O3/TiO2/Al2O3 stacking structure by electron beam evaporation. The TiAlO composite film will form by high-temperature annealing of the nominated Al2O3/TiO2/Al2O3 dielectric stack, and finally, we got the Al2O3/TiAlO/SiO2 memory device structure. The nonvolatile memory device using TiAlO composite film as charge-trapping material shows significant memory effect and excellent long-term charge stability. Although further work is still necessary to improve the overall device properties like increasing the programming speed, the TiAlO composite film is very promising for its applications in future high-performance nonvolatile memory devices.
P-type Si (100) substrates with ρ = 1~10 Ω cm were first cleaned by wet-chemical solution and then dipped in a diluted HF solution (1%) to remove the surface oxide. The wafers were then immediately loaded into a vacuum chamber for deposition. The nominated Al2O3 (5 nm)-TiO2 (10 nm)-Al2O3 (15 nm) structure was deposited by electron beam evaporation at a substrate temperature of 300 °C. After deposition, the films were annealed at a high temperature of 900 °C in O2 atmosphere for 5 min by rapid thermal annealing. Dot-shaped Au top electrodes with an area of ~3.14 × 10−4 cm2 were deposited on the surface of the samples using a shadow mask by vacuum evaporation. The electrical properties of the CTM devices were characterized by an Agilent E4980A impedance analyzer and an Agilent B1500A high-precision semiconductor analyzer at room temperature. High-resolution transmission electron microscopy (HRTEM) was used to study the cross-sectional microstructures of the tri-layer dielectric stack (Tecnai G2 F20 S-Twin). The electronic structure of the memory dielectric stack was investigated by using X-ray photoelectron spectroscopy (ULVAC-PHI, PHI 5000 Versa Probe) with Al Kα X-ray source (1486.6 eV). The defect states and defect levels in our electron beam evaporation deposited TiAlO films were studied by photoluminescence (PL) (Horiba HR Revolution) measurements under 325-nm excitation wavelength.
Results and Discussion
Figure 2c shows the dependence of the memory window on the different sweeping voltages. The memory window increases with the increase of the sweeping voltages, and it tends to be saturated around 16 V sweeping voltages. A large memory window of 5.5 V under ±16 V sweeping voltage indicates significant charge-trapping effect in the TiAlO charge-trapping layer. Even for small scanning gate voltages of ±6 and ±8 V, comparatively large memory windows of 1.8 and 2.6 V can be observed. The P/E characteristics of the memory device were also investigated by measuring the flat voltage shift (ΔV fb) induced by a pulsed P/E voltage. Pulses with different pulse height (ranging from 3 to 12 V) and same pulse width (1 s) were applied onto the diode. The change of the flat-band voltage (V fb) shift with the pulse height was shown in Fig. 2d. The V fb calculation method is the same to that we used in previous work . Memory effect can be clearly observed even under a small P/E voltage of 6 V. Large ΔV fb value of ~3.0 V can be observed under 10 V P/E voltages, demonstrating its low-voltage operations compared with the conventional flash memories. It should be mentioned that the operation speed of the present device is still low. One of the reasons may be that the films were deposited by electron beam evaporation, which is likely to have lots of defects that could limit the P/E performance of the memory device. Charge-trapping memory devices fabricated by atomic layer deposition (ALD) exhibits excellent electrical performances [12, 19]. In the future, if we can use high-quality film growth method such as ALD to fabricate the dielectric stack, the electrical performance of the present TiAlO charge-trapping memory device may have a lot of space to be further improved.
The defect level in TiAlO composite film was characterized by the PL spectra, as shown in Fig. 5c. Through fitting the spectrum with a Gaussian function, the PL spectra can be divided into two separate peaks. The red dotted fitting line shows a PL peak at 533 nm, and the green dotted fitting line shows a PL peak at 580 nm. The PL peak at ~580 nm is believed to have a strong correlation with the defects associated with under-coordinated Ti3+ ions, and the PL peak at ~533 nm is related to the oxygen vacancies [21–23]. In addition to the defects caused by the under-coordinated Ti3+ ions, the charge-trapping effects in TiAlO composite film may be also partly from oxygen vacancy-related defects. Figure 5d shows a schematic diagram of the PL process in our devices. Since the bandgap of TiAlO was determined to be 5 eV by XPS, the PL emission should not come from the band to band emission. The electrons may be excited to the defect levels in the bandgap of TiAlO, whose center position is around 2.3 eV (533 nm) above the top of valence band. The excited electrons in defect levels then recombined with the holes in the valence band. Based on the PL results, we believe that the center of the defect levels in TiAlO film is located close to the middle gap of TiAlO, which are deep traps for charge trapping in our memory devices. The deep trap levels in TiAlO composite film are expected to be one of the critical reasons for the excellent charge retention in the present memory devices.
In this paper, the nominated Al2O3-TiO2-Al2O3 tri-layer charge-trapping memory structure was fabricated by electron beam evaporation, and the tri-layer dielectric stack changed to Al2O3-TiAlO-SiO2 structure after annealing at 900 °C. The annealing formed memory devices with high-k TiAlO charge-trapping layer exhibit significant memory effects and excellent reliability properties. The electronic structures of the tri-layer dielectric stack (Al2O3-TiAlO-SiO2) were investigated by valence band and energy loss spectra measurements of XPS. The deep barrier height for charge confinement in TiAlO layer and good insulating properties of the gate dielectric were believed to be the reasons for the excellent retention and endurance properties of the memory device. The mixing between Al2O3 and TiO2 can increase the defects related to the under-coordinated Ti3+ atoms, thereby enhancing the charge-trapping efficiency of the device. The defect level center of the high-k TiAlO is determined to be located at the middle gap of TiAlO film by PL measurement. Our results imply that the high-temperature annealing formed high-k TiAlO composite film is promising for applications in the future nonvolatile memories.
Atomic layer deposition
Conduction band offset
Constant current stress
Valence band maximums
- X cent :
Charge trap centroid
X-ray photoelectron spectroscopy
This work was supported by the National Natural Science Foundation of China (contract nos. 51431006, 51472093, 51402004), the Project for Guangdong Province Universities and Colleges Pearl River Scholar Funded Scheme (2016), Program for Changjiang Scholars and Innovative Research Team in University (no. IRT13064), Guangdong Innovative Research Team Program (no. 2011D039), and National Program for Research and Development (no. 2016YFB0401501). X.B.L and J.W.G acknowledges the support of Science and Technology Planning Project of Guangdong Province (nos.2014B090915004, 2014B090915005).
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
WCX and YZ performed the experimental works and drafted the manuscript. XBL and JML contributed to the design of the experiment, data analysis, and manuscript revision. ZJT, ZJS, MHQ, MZ, SJW, ZZ, JWG, and GFZ helped to analyze the data. All authors read and approved the final manuscript.
The authors declare that they have no competing interests.
Open AccessThis article is distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made.
- Chau R, Doyle B, Datta S, Kavalieros J, Zhang K (2007) Integrated nanoelectronics for the future. Nat Mater 6:810–1View ArticleGoogle Scholar
- White MH, Adams DA, Bu JK (2000) On the go with SONOS. IEEE Circuits Devices 16:22–31View ArticleGoogle Scholar
- Bu JK, White MH (2001) Design considerations in scaled SONOS nonvolatile memory devices. Solid-State Electron 45:113–20View ArticleGoogle Scholar
- You HC, Hsu TH, Ko FH, Huang JW, Yang WL, Lei TF (2006) SONOS-type flash memory using an HfO2 as a charge trapping layer deposited by the sol–gel spin coating method. IEEE Electron Device Lett 27:653–5View ArticleGoogle Scholar
- Hsu TH, You HC, Ko FH, Lei TF (2006) PolySi-SiO2-ZrO2-SiO2-Si flash memory incorporating a sol-gel-derived ZrO2 charge trapping layer. J Electrochem Soc 153:G934–7View ArticleGoogle Scholar
- Peng YH, Liu F, Liu XY, Du G, Kang J (2013) Improved memory characteristics of a novel TaN/Al2O3/TiO2/HfO2/SiO2/Si structured charge trapping memory. Jpn J Appl Phys 52:04CD13View ArticleGoogle Scholar
- Zhang Y, Shao YY, Lu XB, Zeng M, Zhang Z, Gao XS, Zhang XJ, Liu JM, Dai JY (2014) Defect states and charge trapping characteristics of HfO2 films for high performance nonvolatile memory applications. Appl Phys Lett 105:172902View ArticleGoogle Scholar
- Xiong K, Robertson J, Gibson MC, Clark SJ (2005) Defect energy levels in HfO2 high-dielectric-constant gate oxide. Appl Phys Lett 87:183505View ArticleGoogle Scholar
- Wilk GD, Wallace RM, Anthony JM (2001) High-k gate dielectrics: current status and materials properties considerations. J Appl Phys 89:5243–75View ArticleGoogle Scholar
- Jiang K, Ou X, Lan XX, Cao ZY, Liu XJ, Lu W, Gong CJ, Xu B, Li AD, Xia YD, Yin J, Liu ZG (2014) Remarkable charge-trapping efficiency of the memory device with (TiO2)0.8(Al2O3)0.1 composite charge-storage dielectric. Appl Phys Lett 104:263506View ArticleGoogle Scholar
- Maikap S, Lee HY, Wang TY, Tzeng PJ, Wang CC, Lee LS, Liu KC, Yang JR, Tsai MJ (2007) Charge trapping characteristics of atomic-layer-deposited HfO2 films with Al2O3 as a blocking oxide for high-density non-volatile memory device applications. Semicond Sci Technol 22:884–9View ArticleGoogle Scholar
- Maikap S, Wang TY, Tzeng PJ, Lee HY, Lin CH, Wang CC, Lee LS, Yang JR, Tsai MJ (2008) Low voltage operation of high-k HfO2/TiO2/Al2O3 single quantum well for nanoscale flash memory device applications. Jpn J Appl Phys 47:1818–21View ArticleGoogle Scholar
- Lan XX, Ou X, Cao YQ, Tang SY, Gong CJ, Xu B, Xia YD, Yin J, Li AD, Yan F, Liu ZG (2013) The effect of thermal treatment induced inter-diffusion at the interfaces on the charge trapping performance of HfO2/Al2O3 nanolaminate-based memory devices. J Appl Phys 114:044104View ArticleGoogle Scholar
- Lee CH, Hur SH, Shin YC, Choi JH, Park DG, Kim K (2005) Charge-trapping device structure of SiO2/SiN/high-k dielectric Al2O3 for high-density flash memory. Appl Phys Lett 86:152908View ArticleGoogle Scholar
- Testoni GE, Chiappim W, Pessoa RS, Fraga MA, Miyakawa W, Sakane KK, Galvão NKAM, Vieira L, Maciel HS (2016) Influence of the Al2O3 partial-monolayer number on the crystallization mechanism of TiO2 in ALD TiO2/Al2O3 nanolaminates and its impact on the material properties. J Phys D Appl Phys 49:375301View ArticleGoogle Scholar
- Mikhelashvili V, Eisenstein G (2006) Composition, surface morphology and electrical characteristics of Al2O3-TiO2 nanolaminates and AlTiO films on silicon. Thin Solid Films 515:346–52View ArticleGoogle Scholar
- Mikhelashvili V, Garshtein E, Eisenstein G (2006) Characteristics of Al2O3/TiO2 nanolaminates and AlTiO thin films on Si. IEEE Electron Device Lett 27:344–46View ArticleGoogle Scholar
- Lu XB, Minari T, Liu C, Kumatani A, Liu J-M, Tsukagoshi K (2012) Temperature dependence of frequency response characteristics in organic field-effect transistors. Appl Phys Lett 100:103308Google Scholar
- Maikap S, Wang TY, Tzeng PJ, Lin CH, Tien TC, Lee LS, Yang JR, Tsai MJ (2007) Band offsets and charge storage characteristics of atomic layer deposited high-k HfO2/TiO2 multilayers. Appl Phys Lett 90:262901View ArticleGoogle Scholar
- Gong YP, Li AD, Li XF, Li H, Zhai HF, Wu D (2010) Impact of the Al/Hf ratio on the electrical properties and band alignments of atomic-layer-deposited HfO2/Al2O3 on S-passivated GaAs substrates. Semicond Sci Technol 25:055012View ArticleGoogle Scholar
- Jin CY, Liu B, Lei ZX, Sun JM (2015) Structure and photoluminescence of the TiO2 films grown by atomic layer deposition using tetrakis-dimethylamino titanium and ozone. Nanoscale Res Lett 10:95View ArticleGoogle Scholar
- Shi JY, Chen J, Feng ZC, Chen T, Lian YX, Wang XL et al (2007) Photoluminescence characteristics of TiO2 and their relationship to the photoassisted reaction of water/methanol mixture. J Phys Chem C 111:693–9View ArticleGoogle Scholar
- Mercado CC, Knorr FJ, Mchale JL, Usmani SM, Ichimura AS, Saraf LV (2012) Location of hole and electron traps on nanocrystalline anatase TiO2. J Phys Chem C 116:10796–804View ArticleGoogle Scholar
- Jung MH, Kim KS, Park GH, Cho WJ (2009) Dependence of charge trapping and tunneling on the silicon-nitride (Si3N4) thickness for tunnel barrier engineered nonvolatile memory applications. Appl Phys Lett 94:053508View ArticleGoogle Scholar