Skip to main content
Account
Figure 8 | Nanoscale Research Letters

Figure 8

From: One-Dimensional Nanostructures and Devices of II–V Group Semiconductors

Figure 8

a IdsVdscharacteristics of Zn3P2nanowire MIS-FET under gate bias ranging from −1 V to 7 V with a step of 0.5 V. The inset is a schematic illustration of the device.b IdsVdscharacteristics of single zigzag Zn3P2nanowire-based MIS-FET, showingp-type behavior.IV curves ofc Zn3P2andd Cd3P2nanobelts measured at 300–100 K. The insets show the conductance in a logarithmic scale at zero bias voltage plotted as a function of 1000/T

Back to article page

Navigation