Figure 9From: One-Dimensional Nanostructures and Devices of II–V Group Semiconductorsa Schematic illustration of a Zn3P2nanowire based MS-FET.b ISD–VSDcharacteristics of ap-type Zn3P2nanowire based MS-FET measured at room temperature under gate biases ranging from −0.5 to 0 V with a step of 0.1 VBack to article page