- NANO EXPRESS
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High-Temperature Stable Operation of Nanoribbon Field-Effect Transistors
Nanoscale Research Lettersvolume 5, Article number: 1795 (2010)
We experimentally demonstrated that nanoribbon field-effect transistors can be used for stable high-temperature applications. The on-current level of the nanoribbon FETs decreases at elevated temperatures due to the degradation of the electron mobility. We propose two methods of compensating for the variation of the current level with the temperature in the range of 25–150°C, involving the application of a suitable (1) positive or (2) negative substrate bias. These two methods were compared by two-dimensional numerical simulations. Although both approaches show constant on-state current saturation characteristics over the proposed temperature range, the latter shows an improvement in the off-state control of up to five orders of magnitude (−5.2 × 10−6).
The nanoribbon structure has recently been extensively investigated for many applications, such as ZnS nanoribbon lasers , graphene nanoribbon field-effect transistors (GNRFETs) , nanoribbon sensors in Si  and other materials . Nanoribbon structures offer a relatively easy system to access, control and process, due to their relatively larger scale compared to other nanostructures, such as nanowires (NWs) , nanodots (NDs)  and nanotubes (NTs) . Nanoribbons or thin silicon on insulators have many advantages, such as low leakage and a high on/off current ratio, ION/IOFF, which leads to low power consumption while the device is inactive . In addition, since their parasitic capacitance is effectively eliminated by the underlying insulating layer, nanoribbon- or thin silicon-based devices have advantages for RF applications . Such structures also have a lower threshold shift in response to temperature variations [10–13]. However, the reduction in mobility induced by the thermal scattering causes the operation points of the device to vary with the temperature. This temperature-dependent variation of the operation points makes the devices hard to operate properly.  For some high-temperature circuits, it is desirable that the individual devices have a specific operation point where the device characteristics show no variation with temperature. In this work, we demonstrate the feasibility of the constant operation of the fabricated devices in the temperature range from 25 to 150°C. The method employed to achieve the constant operation of the fabricated devices, which is similar to zero temperature coefficients (ZTC), is based on the use of a substrate bias (VSUB). By accumulating or depleting the carriers on the channel surface using the substrate bias (VSUB), we show that the device on/off characteristics show minimal variation with temperature.
A 30-nm-thick p-type silicon on insulator (SOI) wafer has been used as the starting material, and the SOI layer has been thinned down to 20 nm by oxidation. The length LCH and width WCH of the channels, defined by conventional lithography, were 30 and 10 μm, respectively. The thickness (tOX) of the gate oxide was 40 nm, and n+ poly silicon was used as the gate electrode. Au/Al was used as the metal electrodes for the source, drain, gate, and substrate contacts. Figure 1 shows a schematic representation of the fabricated nanoribbon device. The electrical characteristics of the devices were measured by an HP4155b semiconductor parameter analyzer with a hot chuck for elevated temperature measurements. To diffuse the heat over the whole device at each temperature, the device was heated for a long enough time before each measurement.
We used a substrate bias (VSUB) to ensure the constant operation of the devices at elevated temperatures, and the measurements were compared with the two-dimensional simulation results obtained from structures identical to those of the fabricated devices . In order to evaluate the substrate and top bias-dependent channel carrier modulation as a function of temperature, we extracted the channel cross-section profiles containing the on- and off-current density distribution at different temperatures.
Results and Discussion
Figure 2a shows the gate transfer characteristics of the fabricated (solid lines) and simulated (dashed lines) nanoribbon FET structures. The current level decreases as the temperature increases, which is ascribed mainly to the influence of lattice scattering caused by the elevated temperature on the mobility decay. Figure 2b shows the decays in the normalized saturation current level and mobility values at different temperatures. Both the simulated and measured current levels and therefore the mobility values follow the power-law decay behavior (∝ T−1.5). Note that the mobility values presented in Fig. 2 do not have a unit but instead show relative degradation ratio with respect to the room temperature value. Such mobility degradation, where lattice scattering is the dominant scattering mechanism, can be expressed by a power law . This variation of the current level or mobility can make the device difficult to use in high-temperature or temperature-variable ambient applications.
To overcome such a thermal problem, which may result in the variation of the operation point, it is desirable to keep the current level constant over a range of temperatures. In order to realize such operation of the nanoribbon FETs, we propose the following two methods of compensating for the variation in the current level with temperature from room temperature up to 150°C; (1) A suitable positive bias VSUB is applied to realize this constant level operation, by enhancing the current level at elevated temperatures to the room temperature (T ~ 25°C) current level, as can be seen in method ‘(1)’ of Fig. 3a. (2) A negative VSUB is applied to reduce the current level at different temperatures down to its level at T ~ 150°C, as can be seen in method ‘(2)’ of Fig. 3a.
Figure 3a shows the drain characteristics of the fabricated (solid lines) and simulated (dashed lines) nanoribbon FETs as a function of temperature in the range between 25 and 150°C. Figure 3b, 3c, 3d and 3e show the channel cross-sections of the device, showing the conduction current density contours. Figure 3b and c show the conduction current density contours for the ‘on’ state at room temperature and T ~ 150°C, respectively. These two contour plots clearly indicate that the conduction current is reduced by the mobility degradation as the temperature increases. Figure 3d and 3e show the constant ‘off’ states at room temperature and T ~ 150°C, respectively.
Figure 4a shows the compensated IDS—VDS curves derived from the measurements (solid lines) and simulations (dashed lines) with a positive substrate bias VSUB, according to ‘method (1)’. The inset shows the VSUB values applied for the purpose of keeping the operation of the device constant for temperatures in the range from 25 to 150°C. An approximately constant level on-state was maintained in spite of the temperature variation. However, the maximum leakage current in the off state is as much as ~9% of the on-state current level. This is due to the additional inversion currents on the bottom of the channel surface formed by the positive substrate bias, VSUB. As can be seen in Fig. 4c, an increase in the current density, J, is clearly observed on the bottom of the channel surface.
Unlike in method (1), where the complete off-state of the device is not achieved, method (2) uses a negative substrate bias, VSUB. Figure 5a shows the compensated IDS—VDS curves of the fabricated (solid lines) and simulated (dashed lines) devices with negative substrate bias (VSUB) based on method (2). The inset also shows the negative substrate bias (VSUB) applied for the purpose of keeping the operation of the device constant for temperatures in the range from 25 to 150°C. Constant on- and off-states were successfully accomplished at different temperatures. In contrast to method (1), the off-state leakage current levels are drastically suppressed in the linear scale values of the drain currents. This is due to the negative VSUB, which effectively depletes the carriers in the channel. This can also be seen in Fig. 5b and 5c, where no significant inversion currents are observed on the bottom of the channel surface.
Table 1 compares the off-state drain leakage portion of the two methods at different temperatures. As shown in Table 1, in the case of method (1), the off-state leakage portion measured at 25°C is 0.28%, whereas method (2) shows clearly reduced values of 5.2 × 10−6, suggesting that the leakage control is about five orders of magnitude better than that in method (1). As the temperature increases, the leakage portion increases in both cases, but the leakage portion in method (2) is still one or two orders of magnitude smaller than that in method (1) at elevated temperatures of 125 and 150°C.
In summary, we report the constant temperature operation of nanoribbon FETs in the temperature range of 25–150°C. In order to compensate for the variation in the current level with the temperature in the range from 25 to 150°C, we propose two methods. The physical mechanisms are; (1) to accumulate the lower part of semiconducting channel by applying a suitable negative substrate bias to enhance the total current level at elevated temperatures or (2) to deplete the lower part of the semiconducting channel by applying a positive substrate bias to reduce the total current level at lower temperatures. The leakage current level was drastically reduced by the negative substrate bias, as the carriers in the channel are effectively depleted, thus compensating for the fluctuating off-current level. Although both approaches show constant on-state current saturation characteristics over the proposed temperature range, the latter shows an improvement in the off-state control of up to five orders of magnitude (~5.2 × 10−6). These results were confirmed by two-dimensional numerical simulations, which show that the substrate bias causes the channel to be effectively depleted or accumulated.
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This work was supported by National Research Foundation of Korea Grant funded by the Korean Government (2009-0066544 and 2010-0015360) and the Research Grant of Kwangwoon University in 2010.
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