Figure 3
From: A Novel Way for Synthesizing Phosphorus-Doped Zno Nanowires
a I DS –V DS plots of P-doped ZnO nanowire FETs measured under UV illumination. Inset: The schematic illustration of the measured device b IDS–VDS plot of the P-doped ZnO nanowire FETs transistor with platinum electrodes. Lower right inset: Enlarged IDS–VDScurve in dark. Upper left inset: SEM image of a typical device c NBE of pure and P-doped ZnO nanowires at 10 K. Inset: enlarged part of the peaks around 3.31 eV for P-doped ZnO nanowires d Temperature-dependent PL spectra of P-doped ZnO nanowires with the evolution of two separate peaks around 3.31 eV.