Room light anodic etching of highly doped n-type 4 H-SiC in high-concentration HF electrolytes: Difference between C and Si crystalline faces
© Gautier et al.; licensee Springer. 2012
Received: 5 April 2012
Accepted: 3 July 2012
Published: 3 July 2012
In this paper, we study the electrochemical anodization of n-type heavily doped 4 H-SiC wafers in a HF-based electrolyte without any UV light assistance. We present, in particular, the differences observed between the etching of Si and C faces. In the case of the Si face, the resulting material is mesoporous (diameters in the range of 5 to 50 nm) with an increase of the ‘chevron shaped’ pore density with depth. In the case of the C face, a columnar morphology is observed, and the etch rate is twice greater than for the one for the Si face. We've also observed the evolution of the potential for a fixed applied current density. Finally, some wafer defects induced by polishing are clearly revealed at the sample surfaces even for very short etching times.
Silicon carbide (SiC) has shown huge potential in the field of microelectronic devices. Indeed, this material is characterized by a wide bandgap, high critical electrical field, high electron velocity, and high thermal conductivity. As a consequence, these properties have been employed in various devices where high temperature, high power levels, or high frequencies are required . Among all the polytypes existing for this material, the most common are 6 H, 4 H, 3 C, and 15R. In the case of the hexagonal ones (4 H, 6 H), the strong polar nature of the Si-C bond leads to particular properties of the different crystallographic plans. For instance, the oxidation is clearly anisotropic .
The anodic etching of silicon carbide is a well-known technique since the first experiments performed by Shor et al. in 1993 . This technique seems to be a very promising way to etch this material which is very resistant against traditional chemical etching methods. Moreover, porous SiC is known to be an electrical insulating material , and its high specific surface allows the fabrication of thick oxide layers by an annealing process . This material has also demonstrated a great potential for epitaxial growth .
In this work, we discuss the anodic etching of highly doped (0.03 ohm.cm) n-type 4 H-SiC without any UV lighting contrary to most of the experiments that have been done until now [7, 8]. In particular, we explore the morphology differences after etching of Si or C faces. In the last part, we present the polishing defects that can be revealed by the electrochemical etching.
The main parameters impacting porous semiconductor morphology are the substrate type and doping, the current density or applied voltage, the temperature, the electrolyte composition, and the light intensity and wavelength for n type. In the case of SiC, we must take into account also the influence of the crystalline faces.
The homogenization of the electrolyte is performed by two stirring rods. This setup helps also to remove the gas bubbles produced during the reaction.
In this study, we used 3-in. 4 H-SiC bulk wafers from Tankeblue® manufacturer (Beijing, China) (4° off-axis) in which square samples of 1.5 cm were achieved. The etched area was about 0.79 cm2 (Ø = 1 cm). The substrate thickness was about 350 μm. The wafers were nitrogen-doped and had a resistivity of 0.037 Ω·cm. The etching was performed under room light without any additional lighting. The duration was fixed at 30 min. The HF concentration is 30%, and the surfactant used was the acetic acid with volume ratios HF(50%):acetic acid:H2O of 4.6:2.1:1.5. The anodization was performed in a galvanostatic mode, and the potential between the two platinum electrodes was measured.
The addition of acetic acid as a surfactant in the case of SiC etching is quite unusual. Most of the time, the ethanol is used to increase the electrolyte wettability. However, some authors report the addition of other agents such as Triton X-100 for example . Nevertheless, acetic acid has proven its efficiency in the case of porous silicon etching .
Then, the formed SiO2 is chemically dissolved by HF. In our case, the HF concentration can be considered as very high with regard to the values reported in the literature, generally between 5% and 10% . As a consequence, the SiO2 dissolution cannot be considered as a limiting factor.
Results and discussion
In this section, we discuss about the voltage behavior varying the applied potential during the SiC etching. We present also the final morphologies observed with a particular emphasis on the difference between the C and Si faces.
Evolution of the anodization potential
The voltage is also increasing in both cases during the experiment. This effect can be correlated with the progressive penetration of the electrolyte in the pores. Indeed, the electrolyte electrical resistivity is about 4 Ω·cm, while the wafer resistivity is two orders of magnitude lower. Moreover, the pore walls are quasi fully depleted. As a consequence, the ohmic resistance increases drastically when the etching front progress into the bulk.
At first, at the opposite of several authors , we can observe a variation of the morphology only in depth but in a homogeneous distribution on the etched surface for a current density of 25.5 mA/cm2 during 30 min. The average thicknesses of our SiC porous layers were 20 μm and 40 μm, respectively, for the Si and C faces with a dispersion of about 10%. The high etching rates observed for the C face have been also noticed by some authors [7, 14]. Nevertheless, in every case, the etching was assisted by illumination. Here, we assume that the holes necessary to produce the SiC oxidation can be generated near the space charge region mainly by tunneling [15, 16]. This hypothesis can be confirmed by the low voltages necessary to etch the wafers and the observation of mesoporous morphologies. In addition, if we change the anodization duration, keeping constant the current density, the thickness can be modulated.
Some authors have reported pore shrinkage with depth , but this effect can only be attributed to the frontside illumination. In fact, in this case, the pores are continuously etched during all the anodization because holes are generated also near the surface. In our case, the holes participating to the reaction are localized near the pore tip. As a consequence, the enlargement (from 20 to 50 nm) and the radical change in the morphology can be attributed to the active species depletion at the pore depth.
After a short initiation process and growth of the pores until they reach a steady state, the electrochemical etching is governed by the ratio between the oxidation reaction and the oxide removal rates. The first one is governed by the hole diffusion to the electrolyte/SiC interface. The second one is mainly dependent on the local HF concentration at the pore tip. As a consequence, if we are in the presence of columnar structures, it's because the oxide removal is considerably faster than the electrochemical oxidation. Then, the holes diffusing to the interface are consumed at the pore tips.
Surface defect revelation on si face
In this paper, we've demonstrated the feasibility to achieve homogeneous porous silicon carbide layers from highly doped 4 H-SiC wafers without UV illumination. In particular, we put into relief the electrochemical etching behavior between the Si and C faces. We've shown also the morphologies at different depths and with various current densities. Finally, we've presented some interesting consequences of the surface state on the pore nucleation.
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