Figure 1From: Highly organised and dense vertical silicon nanowire arrays grown in porous alumina template on <100> silicon wafersGeneral schematic of the process steps used. (a) Porous alumina layer fabrication using electrochemistry. (b) Picture of a 2 × 2-cm2 sample, reference: centimetre scale. (c) Thermal nanoimprint lithography process used to pattern the surface of thin aluminium layers supported by silicon substrates, Al anodization and Si NW growth.Back to article page