The influence of passivation and photovoltaic properties of α-Si:H coverage on silicon nanowire array solar cells
© Li et al.; licensee Springer. 2013
Received: 10 July 2013
Accepted: 10 September 2013
Published: 23 September 2013
Silicon nanowire (SiNW) arrays for radial p-n junction solar cells offer potential advantages of light trapping effects and quick charge collection. Nevertheless, lower open circuit voltages (Voc) lead to lower energy conversion efficiencies. In such cases, the performance of the solar cells depends critically on the quality of the SiNW interfaces. In this study, SiNW core-shell solar cells have been fabricated by growing crystalline silicon (c-Si) nanowires via the metal-assisted chemical etching method and by depositing hydrogenated amorphous silicon (α-Si:H) via the plasma-enhanced chemical vapor deposition (PECVD) method. The influence of deposition parameters on the coverage and, consequently, the passivation and photovoltaic properties of α-Si:H layers on SiNW solar cells have been analyzed.
Nanowire-based solar cells hold promise for next generation photovoltaics. In particular, silicon micro/nanowires have attracted considerable interest due to their potential advantages, including light trapping effects to enhance broadband optical absorption [1, 2] and the possibility to engineer radial p-n junctions using a core-shell structure, which in turn increases the carrier collection [3–14]. In a radial p-n junction - a promising approach - crystalline silicon (c-Si) micro/nanowires are used as core and high-temperature diffused layers or low-temperature deposited silicon layers form the shell. These core-shell micro/nanowire array structures are expected to reduce the requirements on the quality and the quantity of Si needed for the fabrication of solar cell.
Thus far, several methods have been established for the controlled growth of silicon nanowires (SiNWs). For instance, highly parallel SiNWs of desired lengths and diameters ranging from a few tens of nanometers to a few hundreds of nanometers could conventionally be obtained by aqueous electroless chemical etching of single crystalline silicon wafers [15–20]. Similarly, hydrogenated amorphous silicon (α-Si:H) can be deposited by the plasma-enhanced chemical vapor deposition (PECVD) method. According to this report, an efficiency of 7.29% was realized by fabricating a core-shell nanowire solar cell with the structure TCO/α-Si:H (p+)/α-Si:H (i)/c-Si (n) . In addition, it has been demonstrated that the deposition of an ultrathin passivating Al2O3 tunnel layer on the highly doped p-type α-Si:H, prior to the deposition of TCO, further increases the efficiency to 10.0% .
However, there are certain shortcomings that need to be addressed to fabricate nanowire solar cells with expected efficiency. For example, a low open circuit voltage (Voc) in SiNW solar cells results in low energy conversion efficiency compared to the efficiency of bulk Si solar cells. Moreover, compared to Si microwire (SiMW) solar cells [5–8], which are formed by deep reactive ion etching, the Voc of SiNW solar cells is typically lower. This could be attributed to the large surface-to-volume ratio exhibited by SiNWs. Essentially, the performance of SiNW solar cells depends critically on the quality of the SiNW interfaces. Hence, surface passivation of SiNWs is a critical process for solar cell applications. Compared with the fabrication of planar c-Si and Si microwire arrays, surface passivation of SiNWs is a more challenging task due to the small size and the possible bundling of NWs [15–20]. Some reports have demonstrated high-efficiency silicon photovoltaics through excellent surface passivation of crystalline planar Si using α-Si:H deposited by PECVD [21–23]. Nevertheless, to the best of our knowledge, there are not many systematic studies on the deposition of α-Si:H, and reports analyzing the influence of thickness and coverage of this amorphous silicon layer on the surface passivation as well as the open circuit voltage of the fabricated cells.
Hence, in this work, we have prepared SiNWs using metal-assisted chemical etching method and deposited α-Si:H passivation layers by PECVD method. Furthermore, we have studied the effect of PECVD deposition conditions of α-Si:H, such as plasma power and deposition time, on the coverage of α-Si:H layers on SiNWs. In addition, we have evaluated the influence of passivation quality and thickness of α-Si:H layers on the open circuit voltage of the fabricated silicon nanowire array solar cells.
Treatment of the backside of Si wafers
In this study, double side polished p-type solar grade Si (100) wafers of thickness 180 μm and resistivity 1 to 2 Ω cm were used for the fabrication of solar cells. Prior to fabrication, Si wafers were initially cleaned in a solution of NH4OH/H2O2/H2O (1:1:5), followed by cleaning in a boiling solution of HCl/H2O2/H2O (1:1:5). The cleaned wafers were subsequently immersed in dilute HF solution to remove surface oxides and finally dried in a flux of nitrogen. Starting with the cleaned Si wafers, the layers to be deposited on the backside of the Si wafers were fabricated before the growth of SiNWs.
In order to measure the effective lifetime of as-prepared SiNWs and α-Si:H-covered SiNWs, 25-nm-thick Al2O3 layers were deposited on the backside of the wafers by the atomic layer deposition (ALD) method. The Si wafers thus obtained were subsequently annealed at 400°C in N2/H2 for 10 min to passivate the backside of the Si wafers. For this, trimethylaluminum (TMA, Al(CH3)3) and water (H2O) were used as precursors. High-purity nitrogen (N2) gas was used as the carrier and purge gas. Processing temperature and pressure were set to 200°C and 100 Pa, respectively.
Further, another backside treatment was adopted to fabricate the SiNW solar cells. Al paste (Dupont 1287, Wilmington, DE, USA) was coated on the backside of the Si wafers, which were finally annealed at 850°C for 1 min in N2 atmosphere.
Preparation of silicon nanowire array
Following the treatments on the backside of the Si wafers, vertically aligned SiNWs were grown on the other side (front side) of the Si wafers by the metal-assisted chemical etching method. This involved the electroless deposition of Ag particles in AgNO3/HF solution and subsequent Ag-assisted etching in the same solution. During the chemical etching process, the backside of the Si wafers with Al2O3 or Al layers was protected using a Teflon container. In the typical process, the etchant containing silver ions (Ag+, 0.02 M) and fluoric acid (HF, 5.0 M) was used for the growth of SiNWs. Etching time was controlled at 3 and 5 min to obtain SiNWs of desired dimension at 50°C. After etching, the as-prepared samples were immersed in 50% conc. HNO3 and 5% conc. HF, successively, to remove residual Ag particles and SiO2. Finally, the samples were rinsed with deionized water and dried at room temperature in a smooth nitrogen flux.
Deposition of α-Si:H layers and fabrication of silicon nanowire array solar cells
Subsequently, α-Si:H layers were deposited by radio frequency PECVD method. Prior to the deposition of α-Si:H, the SiNWs prepared by chemical etching were exposed to H2 plasma at a plasma power of 30 W for 1 min to clean the surface in a PECVD chamber. For the intrinsic growth of α-Si:H layers, 10 sccm of 5% H2-diluted SiH4 was introduced in the PECVD chamber, while maintaining a substrate temperature of 180°C and a pressure of 100 Pa. To fabricate SiNW solar cells, a mixture of 10 sccm of 5% H2-diluted SiH4, 1 sccm of 0.5% H2-diluted PH3, and 40 sccm of H2 was introduced for 20 min to deposit n-type Si:H layers above intrinsic α-Si:H layers. During the deposition, the substrate temperature was maintained at 180°C, at a pressure of 150 Pa and power of 70 W. Following that, 3% Al-doped ZnO (AZO) films were deposited on the as-grown n-type Si:H layers by ALD method. For that, diethyl zinc (DEZ), TMA, and water were used as precursors, and the deposition was performed at 200°C for 1 h, resulting in the formation of 90-nm-thick Al-doped ZnO films. Finally, Ag grid electrodes of thickness 100 nm were deposited by sputtering method using a mask.
The surface and cross-sectional morphology of the prepared SiNWs were analyzed using field emission scanning electron microscope (FESEM) (Philips XL30 FEG, FEI, Hillsboro, OR, USA) and transmission electron microscope (TEM, JEOL JEM-2100, Akishima, Tokyo, Japan). For TEM analysis, SiNWs were scratched from the silicon substrates and dispersed in ethanol by ultrasonic. The antireflection properties of SiNW arrays were evaluated by reflectivity measurement under UV-visible light absorption. The effective lifetimes (τeff) were investigated using microwave-detected photoconductance decay (μPCD) technique . The extraction of τeff within a semiconductor sample by means of the μPCD measurement method is based on the change of the reflectance of a microwave when irradiated on the sample. A short laser pulse, with a constant pulse width of tp = 200 ns optically generated excess charge carriers. This change of the excess charge carrier density is directly linked with a change of the conductivity of the sample. After the laser is switched off, the conductivity decreases monoexponentially and can be fitted with an exponential curve to extract the effective lifetime at a given position of the sample. The measurement setup used in this contribution is the commercially available WT-2000 tool distributed by Semilab Semiconductor Physics Laboratory Co. Ltd., Budapest, Hungary.
Photovoltaic parameters of the fabricated SiNW array solar cell, namely open circuit voltage (Voc) and short circuit current density (Jsc), were measured using a Keithley 2400 source meter (Cleveland, OH, USA). A solar simulator (500-W Xe lamp) was employed as the light source, and incident light intensity was calibrated using a standard silicon solar cell and light intensity meter (Radiometer FZ-A, Copenhagen, Denmark), simultaneously. The external quantum efficiency (EQE) experiments were carried out using a system consisting of a Xe lamp (300 W) with a monochromator (Oriel 74100, Newport Corp., Irvine, CA, USA). The light intensity was measured with an optical power meter (Ophir Optronics 70310, Newport Corp.) equipped with a calibrated thermopile head (Ophir Optronics 71964, Newport Corp.).
Results and discussion
Characterization of as-deposited and α-Si:H-covered silicon nanowire arrays
During the PECVD process, since the SiNWs are closely packed, the flow velocity of reaction gas is not only much slower in the gaps between the SiNWs than on the planar surface but also is gradually decreased along the vertical direction of SiNWs. Under this condition, the gas in the feed suspension is prone to be deposited on the top surface of the NWs to form a thick layer. This results in inhomogeneous coverage of α-Si:H layers on NW walls along the vertical direction, as shown in the inset in Figure 4c. Hence, a low deposition rate produced by a small plasma power is more favorable to supplement fresh reaction gas at the bottom of SiNWs, consequently to obtain a relatively uniform coverage of a-Si layers.
Passivation properties of α-Si:H on silicon nanowire arrays
In general, it is believed that the surface passivation properties of the α-Si:H layer greatly improves upon additional thermal annealing at certain temperatures. However, the annealing temperature should not be too high in order to prevent escape of H in α-Si:H. On the basis of this reason, the annealing temperature was chosen as 200°C, and the subsequent preparation of AZO was performed at 200°C. The improvement was quantitatively evaluated by annealing the as-deposited samples at 200°C for 1 h in N2 ambient. As expected, the annealed samples show improvement in the surface passivation properties (Figure 5). This is owing to the fact that additional thermal annealing can facilitate improved hydrogen redistribution to the interface region. Moreover, it has also been reported that atomic hydrogen under thermal treatment can interchange from the easilybroken Si-H2 bonds existing near the c-Si/a-Si:H interface to passivate the dangling bonds. After such thermal treatment, the transformation of Si-H2 to Si-H results in effective restructuring for improved surface passivation properties .
Photovoltaic properties of SiNW solar cells
Performance of SiNW solar cells with α-Si:H layers deposited under 15-W plasma power
Plasma power (W)
Deposition time of α-Si:H (min)
J (mA cm−2)
Performance of SiNW solar cells with α-Si:H layers deposited under 40-W plasma power
Plasma power (W)
Deposition time of α-Si:H (min)
However, in the case of 0.51-μm SiNW solar cell, the dependence of Voc on plasma power seems to be contrary. Due to the shorter length, the thickness of α-Si:H layer deposited at the bottom of 0.51-μm SiNW is much larger than that deposited on 0.85-μm SiNW. In addition to the passivation effect, variation in α-Si:H layer thickness on SiNWs along the vertical direction is expected to influence the Voc. The variation modulates the depletion region of the radial p-n junction, which makes the distribution of built-in electric field in SiNW radial p-n junction uneven, as shown in the inset in Figure 3c. Due to the inhomogeneity of α-Si:H coverage, the SiNW cell performs analogous to solar cells in parallel and consequently leads to a low voltage. From the simulation, it can be expected that low plasma power will result in uniform coverage. Although the measured minority lifetimes are shorter for the SiNW array with α-Si:H deposited at 15 W than those at 40 W, the largest Voc of 0.50 V was observed for 0.51-μm SiNW passivated at 15 W for 30 min. The largest Voc of 0.50 V is similar to the results obtained from the nanowire device demonstrated by Jia et al. [13, 14]. Nevertheless, the observed Voc value is still lower than that of SiMW solar cells [5–8]. It is suggested that the inhomogeneity of α-Si:H coverage and passivation on SiNWs along the vertical direction reduces the open circuit voltage.
In this work, we have analyzed the influence of deposition conditions and surface passivation properties of α-Si:H layer on the nanowire arrays. The thickness of α-Si:H layer and minority lifetime of the SiNW array was found to increase with the increase of deposition time and plasma power. The open circuit voltages of 0.85-μm SiNW solar cells increase with the deposition time and plasma power, while the open circuit voltage dependence of 0.51-μm SiNW solar cells seems to be contrary. The largest Voc of 0.50 V was observed for the 0.51-μm SiNW solar cell with α-Si:H passivation layer deposited at 15 W for 30 min. During the PECVD process, since the SiNWs were closely packed, the coverage of α-Si:H layer is inhomogeneous. It is suggested that the open circuit voltage not only depends on the thickness and coverage of the amorphous silicon layer but also on the inhomogeneity of amorphous silicon coverage. The inhomogeneity of α-Si:H coverage and passivation on SiNWs along the vertical direction would lead to a low open circuit voltage and consequently low efficiency of SiNW solar cells.
This work was supported by the National High Technology Research and Development Program 863 of China (2011AA050511), Jiangsu ‘333’ Project, The National Natural Science Foundation of China (51272033), and the Priority Academic Program Development of Jiangsu Higher Education Institutions.
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