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Figure 6 | Nanoscale Research Letters

Figure 6

From: High-performance bilayer flexible resistive random access memory based on low-temperature thermal atomic layer deposition

Figure 6

The DC endurance test of the device. Voltage sweeping was from 0 V to 2 V for set and from 0 V to −2 V for reset at room temperature, with a reading voltage of 0.1 V. (a) The continuous program and erase test, (b) the statistical result of the set and reset voltages, and (c) the statistical result of the resistance distributions of the LRS and HRS.

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