Performance enhancement of multiple-gate ZnO metal-oxide-semiconductor field-effect transistors fabricated using self-aligned and laser interference photolithography techniques
© Lee et al.; licensee Springer. 2014
Received: 31 March 2014
Accepted: 3 May 2014
Published: 17 May 2014
The simple self-aligned photolithography technique and laser interference photolithography technique were proposed and utilized to fabricate multiple-gate ZnO metal-oxide-semiconductor field-effect transistors (MOSFETs). Since the multiple-gate structure could improve the electrical field distribution along the ZnO channel, the performance of the ZnO MOSFETs could be enhanced. The performance of the multiple-gate ZnO MOSFETs was better than that of the conventional single-gate ZnO MOSFETs. The higher the drain-source saturation current (12.41 mA/mm), the higher the transconductance (5.35 mS/mm) and the lower the anomalous off-current (5.7 μA/mm) for the multiple-gate ZnO MOSFETs were obtained.
Over the past years, in view of the significant progress in fabrication techniques and epitaxial structures of III-V-based semiconductors [1–4], the III-V-based semiconductors were widely used in sensors [5, 6], optoelectronic devices [7, 8], electronic devices [9, 10], and associated systems [11, 12]. Among the electronic devices, the metal-oxide-semiconductor field-effect transistors (MOSFETs) are widely studied to improve the noise, output power, and power handling capacity [13, 14]. Recently, because the ZnO-based semiconductors have the similar lattice constant and the same crystal structure with those of the GaN-based semiconductors, they make a promising potential candidate for replacing the GaN-based semiconductors due to their inherent properties including wide direct bandgap, large exciton binding energy, nontoxicity, stability, and biocompatibility. Several kinds of ZnO-based MOSFETs were reported, previously [15, 16]. In general, single-gate structure was used to control the performances of the resulting MOSFETs. As predicated by the International Technology Roadmap for Semiconductors (ITRS), the dimension of the MOSFETs is continuously scaled down to reduce the area of integrated circuits. However, it becomes very difficult to maintain the necessary performances of the down-scaled MOSFETs owing to significantly short channel effects. To overcome the short channel effects, the architecture of double-gate (DG) MOSFETs , Fin FETs , HFin FETs , underlap FETs , and others was reported, previously. Compared with the single-gate MOSFETs, the peak lateral electrical field of the double-gate MOSFETs is lower . Consequently, in addition to the suppression of the anomalous off-current caused by the field emission of carriers from channel defects, the gate length reduction is beneficial for enhancing the saturation current density and the transconductance of the resulting double-gate MOSFETs . In this work, to study the channel transport control function of the multiple-gate structure, multiple-gate ZnO MOSFETs were fabricated and measured. Although the electron beam lithography is widely used to pattern narrow linewidth in devices, it suffers from high operation cost and complex equipment. In this work, the simple and inexpensive self-aligned photolithograph and laser interference photolithography were proposed to pattern the multiple-gate structure of the ZnO MOSFETs.
Results and discussion
In conclusion, the self-aligned photolithography technique and the laser interference photolithography technique were used to fabricate the multiple-gate structure of multiple-gate ZnO MOSFETs. The multiple-gate structure had a shorter effective gate length and could enhance the gate-source electrical field and reduce the maximum gate-drain electrical field in comparison with the single-gate structure. Therefore, the performance of the multiple-gate ZnO MOSFETs was improved. Compared with the single-gate ZnO MOSFETs, the associated performances of the multiple-gate ZnO MOSFETs, including a higher drain-source saturation current of 12.41 mA/mm, a higher transconductance of 5.35 mS/mm, and a lower anomalous off-current of 5.7 μA/mm, could be effectively enhanced. The experimental results verified that the high-performance multiple-gate MOSFETs could be fabricated by the proposed simple and cheaper method. When the laser with a shorter wavelength was used in the laser interference photolithography, the multiple-gate MOSFETs with nanometer-order gate length could be expected by using this proposed technique.
The authors gratefully acknowledge the support from the Ministry of Science and Technology of Republic of China under Contract Nos. MOST 102-2221-E-006-283, MOST 101-2628-E-006-017-MY3, MOST 101-2923-E-006-002-MY3, and MOST 101-2923-E-006-004-MY2, and Advanced Optoelectronic Technology Center and Research Center Energy Technology and Strategy of the National Cheng Kung University.
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