- Nano Express
- Open Access
Self-compliance RRAM characteristics using a novel W/TaO x /TiN structure
© Maikap et al.; licensee Springer. 2014
- Received: 1 March 2014
- Accepted: 15 May 2014
- Published: 10 June 2014
Self-compliance resistive random access memory (RRAM) characteristics using a W/TaO x /TiN structure are reported for the first time. A high-resolution transmission electron microscope (HRTEM) image shows an amorphous TaO x layer with a thickness of 7 nm. A thin layer of TiO x N y with a thickness of 3 nm is formed at the TaO x /TiN interface, owing to the oxygen accumulation nature of Ti. This memory device shows 100 consecutive switching cycles with excellent uniformity, 100 randomly picked device-to-device good uniformity, and program/erase endurance of >103 cycles. It is observed that the 0.6-μm devices show better switching uniformity as compared to the 4-μm devices, which is due to the thinner tungsten (W) electrode as well as higher series resistance. The oxygen-rich TaO x layer at the W/TaO x interface also plays an important role in getting self-compliance resistive switching phenomena and non-linear current-voltage (I-V) curve at low resistance state (LRS). Switching mechanism is attributed to the formation and rupture of oxygen vacancy conducting path in the TaO x switching material. The memory device also exhibits long read endurance of >106 cycles. It is found that after 400,000 cycles, the high resistance state (HRS) is decreased, which may be due to some defects creation (or oxygen moves away) by frequent stress on the switching material. Good data retention of >104 s is also obtained.
- Resistive switching
- TaO x
Resistive random access memory (RRAM) is a potential candidate among all of the non-volatile memories because of its simple metal-insulator-metal (M-I-M) structure, fast switching speed, long endurance, stable data retention, low power operation, and high scalability potential [1–3]. Although some switching materials such as NiO [4, 5], TiO x [6, 7], HfO x [8–10], AlO x [11, 12], and GdO x [13, 14] have been reported, the TaO x switching material is reported by few research groups [2, 3, 15–17]. Wei et al. reported long endurance of >109 cycles using Pt/Ta2O5−x/TaO2−x/Pt and Ir/Ta2O5−x/TaO2−x/Ir structures with an operation current of approximately 150 μA. Yang et al. also reported long program/erase endurance of 1010 cycles using a Pt/TaO x /Ta structure with a high operation current. Lee et al.  reported the highest program/erase endurance of >1010 cycles using a Pt/Ta2O5−x/TaO2−x/Pt structure and that RRAM can be operated at a low current of <50 μA. Ninomiya et al. reported that the operation current can be reduced to 80 μA by using a two-step formation in a Pt/Ta2O5−x/TaO2−x/Pt structure. In this case, the conducting filament can have a high oxygen vacancy density and thinner diameter, and data retention can also be improved. In our previous study, good resistive switching characteristics using a Ti interfacial layer in a W/TiO x /TaO x /W structure have been reported with an operation current of 80 μA. To get good resistive switching characteristics, almost all of the above structures need a higher formation voltage; most of them are not complementary metal-oxide-semiconductor (CMOS) compatible materials. To meet those requirements, a novel W/TaO x /TiN RRAM device has been investigated for the first time. All materials are CMOS compatible, and the self-compliance (SC) resistive switching phenomena with a low operation voltage of ±2.5 V are reported. This self-compliance property will have the capability of the memory device to control the current overshoot in a simple 1R configuration, which could be a good alternative for a one-transistor and one-resistor (1T1R) configuration.
In this study, self-compliance (<200 μA) bipolar resistive switching phenomena using a W/TaO x /TiN structure are reported under a low voltage of ±2.5 V. A high-resolution transmission electron microscope (HRTEM) image shows active RRAM size of 0.6 × 0.6 μm2. The thicknesses of TaO x and TiO x N y layers are approximately 7 and 3 nm, respectively. The memory device shows 100 consecutive bipolar resistive switching at low self-current compliance of <200 μA, good device-to-device uniformity, non-linear current-voltage (I-V) curve, and read endurance of >106 cycles. It is found that the switching uniformity is better for the 0.6-μm devices as compared to the 4-μm devices, owing to the thinner tungsten (W) electrode as well as higher resistivity. Good data retention of >104 s is also obtained.
First, the SiO2 insulating layer with a thickness of 200 nm was grown on an 8-in. Si wafer. Then, the TiN as a bottom electrode (BE) was deposited by reactive sputtering. The thickness of TiN BE is approximately 250 nm. To isolate and fabricate the via-holes from 0.6 × 0.6 to 4 × 4 μm2, a low-temperature-deposited SiO2 layer with a thickness of approximately 150 nm was deposited on the TiN BEs. Different sizes of the via-holes and BE contacts were etched followed by lithography and etching processes. Photoresist (PR) was patterned, and the via-holes and top electrode (TE) regions were opened on the 8-in. wafers. Then, a wafer was broken into small pieces with each area of approximately 1 × 1.5 in. The TaO x switching material with a thickness of approximately 7 nm was deposited by electron beam evaporation. Pure Ta2O5 shots were used for deposition. The deposition rate was 0.1 Å/s. The film became Ta:Ta2O5. Then, tungsten (W) TE with a thickness of approximately 400 nm was deposited by RF sputtering process. The deposition power and pressure were 100 W and 10 mTorr, respectively. Finally, lift-off was performed to get the final device. During measurement, the TiN BE was grounded and the voltage sweep was applied to the W TEs. Memory characteristics were measured by Agilent 4156C semiconductor parameter analyzer (Agilent Technologies, Santa Clara, CA, USA).
One hundred consecutive switching cycles in the W/TaO x /TiN structures under self-compliance (<200 μA) and low-voltage operation of ±2.5 V are obtained. The thicknesses of TaO x and TiO x N y layers are 7 and 3 nm, respectively, which are observed by HRTEM. The RRAM device sizes are also confirmed by TEM. Our memory device shows good switching characteristics at low self-current compliance with tight distribution of HRS/LRS, excellent device-to-device uniformity, and program/erase endurance of >1,000 cycles. The smaller size devices show better switching characteristics and uniformity as compared to the larger size devices, owing to the thinner W electrode as well as higher series resistance. Interfacial oxygen-rich TaO x layer acts as a series resistance to control the resistive switching characteristics which may also cause the self-compliance resistive switching behavior and non-linear I-V curve at LRS. Switching mechanism is based on the formation and rupture of oxygen vacancy conducting path in the TaO x switching material. The memory device also exhibits a long read endurance of >106 cycles and good data retention of >104 s with a resistance ratio >10. Therefore, this self-compliant W/TaO x /TiN device will have great potential for future non-volatile memory application.
This work was supported by the National Science Council (NSC) of Taiwan, under contract no. NSC-102-2221-E-182-057-MY2. The authors are grateful to Electronics and Optoelectronics Research Laboratories (EOL)/Industrial Technology Research Institute (ITRI), Hsinchu, for their support of the patterned wafers.
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