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Figure 1 | Nanoscale Research Letters

Figure 1

From: A single poly-Si gate-all-around junctionless fin field-effect transistor for use in one-time programming nonvolatile memory

Figure 1

Schematic and equivalent circuit of the single poly-Si JL-FinFET GAA NVM. (a) Schematic of the single poly-Si JL-FinFET GAA NVM with ten NWs and (b) its equivalent circuit. Two transistors, T1 (NW channel) and T2 (wide channel), are connected by a floating gate (FG), and the source and drain of T2 are connected as the controlling gate (CG). The simplified calculation of the voltage in floating gate is appended in (b).

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