# Neuromorphic crossbar circuit with nanoscale filamentary-switching binary memristors for speech recognition

- Son Ngoc Truong
^{1}, - Seok-Jin Ham
^{1}and - Kyeong-Sik Min
^{1}Email author

**9**:629

https://doi.org/10.1186/1556-276X-9-629

© Truong et al.; licensee Springer. 2014

**Received: **15 July 2014

**Accepted: **25 September 2014

**Published: **23 November 2014

## Abstract

In this paper, a neuromorphic crossbar circuit with binary memristors is proposed for speech recognition. The binary memristors which are based on filamentary-switching mechanism can be found more popularly and are easy to be fabricated than analog memristors that are rare in materials and need a more complicated fabrication process. Thus, we develop a neuromorphic crossbar circuit using filamentary-switching binary memristors not using interface-switching analog memristors. The proposed binary memristor crossbar can recognize five vowels with 4-bit 64 input channels. The proposed crossbar is tested by 2,500 speech samples and verified to be able to recognize 89.2% of the tested samples. From the statistical simulation, the recognition rate of the binary memristor crossbar is estimated to be degraded very little from 89.2% to 80%, though the percentage variation in memristance is increased very much from 0% to 15%. In contrast, the analog memristor crossbar loses its recognition rate significantly from 96% to 9% for the same percentage variation in memristance.

## Keywords

## Background

The memristors that had been mathematically predicted by Leon O. Chua in 1971 as the fourth basic circuit element [1] were experimentally found in 2008 [2]. Since the first prediction of memristors, they have been thought as a potential candidate for future neuromorphic computing systems. Among the many advantages of memristors, particularly, the nonlinear charge-flux relationship is important in mimicking synaptic plasticity of biological neuronal systems such as human brains [3–7].

In realizing memristor-based synaptic systems, a crossbar circuit that is made of only passive memristors can be thought of as the densest and simplest architecture among various synaptic circuits that have been developed previously. If a crossbar circuit is made of both memristors and selectors such as transistors and diodes, this kind of hybrid-type crossbar circuit is difficult to be stacked layer by layer. Thus, the pure crossbar circuit with only passive memristors can be a key element to implement the densest and simplest three-dimensional architecture of neuromorphic systems.

In addition to the advantage of popularity of filamentary-switching materials, binary memristors can be much more tolerant against statistical variations compared to analog memristors. This is due to the fact that HRS can still be much higher than LRS, in spite of the large amount of statistical variation in LRS and HRS.

In this paper, we propose a binary memristor crossbar circuit for recognizing five different vowels. The block diagram and the detailed circuit schematic are shown and explained in the following section. In addition, the circuit simulation and statistical simulation are performed, and the simulation results are discussed and finally summarized in this paper [18].

## Methods

*I*

_{a,0}is the current of the ‘x1’ column in the crossbar array for recognizing ‘a’.

*I*

_{a,1}is the current of the ‘x2’ column in the crossbar array for recognizing ‘a’. Similarly,

*I*

_{a,2}and

*I*

_{a,3}are the currents of the ‘x4’ and ‘x8’ columns in the ‘a’ crossbar array. Here, ‘x1’ means that the weight of this column current is as much as 1. In Figure 3, ‘x2’, ‘x4’, and ‘x8’ mean that the weight values are 2, 4, and 8, respectively, for the corresponding columns in the ‘a’ crossbar array. Here,

*I*

_{a}can be calculated with the weighted summation of 8

*I*

_{a,3}+ 4

*I*

_{a,2}+ 2

*I*

_{a,1}+

*I*

_{a,0}. Similarly,

*I*

_{u}is the weighted summation of 8

*I*

_{u,3}+ 4

*I*

_{u,2}+ 2

*I*

_{u,1}+

*I*

_{u,0}for recognizing ‘u’.

*I*

_{o}is the weighted summation of 8

*I*

_{o,3}+ 4

*I*

_{o,2}+ 2

*I*

_{o,1}+

*I*

_{o,0}for recognizing ‘o’. The currents of

*I*

_{a},

*I*

_{i},

*I*

_{u},

*I*

_{e}, and

*I*

_{o}are compared with each other in the winner-take-all circuit [19] to decide which vowel is the best match with the voice input as shown in Figure 3. Output

_{a}, Output

_{i}, Output

_{u}, Output

_{e}, and Output

_{o}are the output signals of the winner-take-all circuit.

*M*

_{1,0},

*M*

_{1,1},

*M*

_{1,2}, and

*M*

_{1,3}are memristors of the ‘x1’ column, ‘x2’ column, ‘x4’ column, and ‘x8’ column, respectively, for the crossbar array of vowel ‘a’. These four memristors are connected to the true signal of channel 1. Similarly,

*M*

_{2,0},

*M*

_{2,1},

*M*

_{2,2}, and

*M*

_{2,3}are memristors of the ‘x1’ column, ‘x2’ column, ‘x4’ column, and ‘x8’ column, respectively, which are connected to the inverted signal of channel 1.

The weighted summation of *I*_{a} is calculated with 8*I*_{a,3} + 4*I*_{a,2} + 2*I*_{a,1} + *I*_{a,0}, as explained just earlier. The circuit for performing the weighted summation is implemented by current mirror circuits as shown in Figure 4a. For example, to realize the weight of ‘1’, we use the current mirror circuit, which is composed of *M*_{7} and *M*_{8}. Here, *M*_{7} and *M*_{8} should have the same size. By doing so, *I*_{a,0} of *M*_{7} can be copied to *M*_{8}. If the weight is 2, the size of *M*_{6} should be twice larger than *M*_{5}. Thereby, the current of *M*_{6} can be twice larger than *I*_{a,1}. For the weight factor of 4, *M*_{4} should be four times larger than *M*_{3}. For the weight factor of 8, *M*_{2} should be eight times larger than *M*_{1}. The currents of *M*_{2}, *M*_{4}, *M*_{6}, and *M*_{8} can be summated by Kirchhoff's current law. The capacitor *C*_{a} can be discharged by the weighted summation of *I*_{a}, which comes from *M*_{2}, *M*_{4}, *M*_{6}, and *M*_{8}. If the weighted summation of *I*_{a} is large, *C*_{a} can be discharged to GND very fast. Here, GND means the ground potential. If the weighted summation of *I*_{a} is small, it takes longer time to discharge *C*_{a} to GND. *M*_{9} is the precharge PMOS, which becomes on when the clock (CLK) signal is low. If *M*_{9} is on, the VC_{a} node is precharged by *V*_{DD}. When the CLK signal is high, *M*_{9} is off. At this time, VC_{a} can be discharged by the weighted summation of *I*_{a} that comes from *M*_{2}, *M*_{4}, *M*_{6}, and *M*_{8}.

Figure 4b shows the winner-take-all circuit that can decide which capacitor becomes discharged the fastest among the five capacitors of *C*_{a}, *C*_{i}, *C*_{u}, *C*_{e}, and *C*_{o}. The five capacitors of *C*_{a}, *C*_{i}, *C*_{u}, *C*_{e}, and *C*_{o} are corresponding to the five vowels ‘a’, ‘i’, ‘u’, ‘e’, and ‘o’, respectively. Using the winner-take-all circuit, we can figure out that a certain vowel corresponding to the fastest-discharged capacitor is the best match with the input of a human voice. VC_{a}, VC_{i}, VC_{u}, VC_{e}, and VC_{o} are the voltages on capacitors *C*_{a}, *C*_{i}, *C*_{u}, *C*_{e}, and *C*_{o}, respectively. Here, *I*_{1}, *I*_{2}, *I*_{3}, *I*_{4}, and *I*_{5} are the comparators. In this case, *I*_{1} compares VC_{a} with *V*_{REF}. *V*_{REF} is a reference voltage to the comparators. If VC_{a} becomes lower than *V*_{REF}, *D*_{a} becomes high. Similarly, *I*_{2}, *I*_{3}, *I*_{4}, and *I*_{5} compare VC_{i}, VC_{u}, VC_{e}, and VC_{o} with *V*_{REF}. *D*_{i}, *D*_{u}, *D*_{e}, and *D*_{o} become high when VC_{i}, VC_{u}, VC_{e}, and VC_{o} are lower than *V*_{REF}. *I*_{6}, *I*_{7}, and *I*_{8} are the OR gates. *I*_{9} and *I*_{10} with the delay line of *τ* constitute a pulse generator circuit. FF_{1}, FF_{2}, FF_{3}, FF_{4}, and FF_{5} are D flip-flop circuits. Output_{a}, Output_{i}, Output_{u}, Output_{e}, and Output_{o} are the output signals of five D flip-flops from FF_{1} to FF_{5}.

*V*

_{i,0}and

*V*

_{i,1}are 0 and 1, respectively. These inputs match the stored memristance values of

*M*

_{1},

*M*

_{2},

*M*

_{3}, and

*M*

_{4}. Here, HRS means high resistance state and LRS is low resistance state. The current summation of

*I*

_{a}can be calculated with

*I*

_{a}=

*I*

_{2,a}+

*I*

_{3,a}−

*I*

_{1,a}−

*I*

_{4,a}.

*I*

_{2,a}and

*I*

_{3,a}are the forward currents through

*M*

_{2}and

*M*

_{3}that are LRS.

*I*

_{1,a}and

*I*

_{4,a}are the reverse currents through

*M*

_{1}and

*M*

_{4}that are HRS. In calculating this current summation,

*I*

_{a}can be expressed simply with

*I*

_{a}≈

*I*

_{2,a}+

*I*

_{3,a}because the reverse currents of

*I*

_{1,a}and

*I*

_{4,a}are much smaller than the forward currents of

*I*

_{2,a}and

*I*

_{3,a}. As we know, HRS is much larger than LRS; thus, we can ignore

*I*

_{1,a}and

*I*

_{4,a}in calculating

*I*

_{a}. From this explanation, we can know that the reverse current through HRS can affect

*I*

_{a}very little.

Now, we can consider Figure 5b, where the input voltages of *V*_{i,0} and *V*_{i,1} do not match with the stored memristance of *M*_{5}, *M*_{6}, *M*_{7}, and *M*_{8}. The current summation of *I*_{b} in Figure 5b can be expressed with *I*_{b} = *I*_{2,b} + *I*_{3,b} − *I*_{1,b} − *I*_{4,b}. Here, *I*_{2,b} and *I*_{3,b} are the forward currents through HRS. *I*_{1,b} and *I*_{4,b} are the reverse currents through LRS. If we compare the matched column's current of *I*_{a} in Figure 5a with the unmatched column's current of *I*_{b}, we can be sure that *I*_{a} is much larger than *I*_{b}. Thus, we can think that the reverse current does not degrade the recognition rate.

_{a}, VC

_{i}, VC

_{u}, VC

_{e}, and VC

_{o}are shown in Figure 6. Here, VC

_{a}seems to be discharged by GND faster than the other capacitor nodes of VC

_{i}, VC

_{u}, VC

_{e}, and VC

_{o}. It means that the voice input matches with the vowel ‘a’ better than the other vowels. The timing diagram of important signals in Figure 4a,b is shown in Figure 7. When the CLK signal is low, all the capacitor nodes of VC

_{a}, VC

_{i}, VC

_{u}, VC

_{e}, and VC

_{o}are precharged by

*V*

_{DD}. At this time, VC

_{a}, VC

_{i}, VC

_{u}, VC

_{e}, and VC

_{o}are higher than

*V*

_{REF}; thus,

*D*

_{a},

*D*

_{i},

*D*

_{u},

*D*

_{e}, and

*D*

_{o}can be low. When the CLK becomes high, five capacitors of

*C*

_{a},

*C*

_{i},

*C*

_{u},

*C*

_{e}, and

*C*

_{o}can be discharged by

*I*

_{a},

*I*

_{i},

*I*

_{u},

*I*

_{e}, and

*I*

_{o}, respectively. Among

*I*

_{a},

*I*

_{i},

*I*

_{u},

*I*

_{e}, and

*I*

_{o}, if

*I*

_{a}is the largest amount of current, VC

_{a}is discharged by GND faster than VC

_{i}, VC

_{u}, VC

_{e}, and VC

_{o}. If VC

_{a}becomes lower than

*V*

_{REF},

*D*

_{a}becomes high. As explained earlier, because VC

_{a}is the fastest falling node among the five capacitive nodes,

*D*

_{a}can also be the fastest rising signal among

*D*

_{a},

*D*

_{i},

*D*

_{u},

*D*

_{e}, and

*D*

_{o}. The fastest rising signal of

*D*

_{a}can generate the locking pulse that can be used as the clock signal of D flip-flop circuits of FF

_{1}, FF

_{2}, FF

_{3}, FF

_{4}, and FF

_{5}. By doing so, we can decide which vowel is the best match to the voice input. The first-rising signal of

*D*

_{a}makes Output

_{a}high, as shown in Figure 7. The other output signals, such as Output

_{i}, Output

_{u}, Output

_{e}, and Output

_{o}, are prevented from rising from low to high by the locking pulse that is generated by the first-rising signal of

*D*

_{a}.

## Results and discussion

*V*

_{DD}/3 write scheme that is known better in mitigating the half-selected cell problem compared to the

*V*

_{DD}/2 write scheme [22].

*σ*) of 10%. The statistical variation was obtained by Monte Carlo simulation that was also provided by Cadence software. This statistical simulation is very important because real memristors are susceptible to process variation. To analyze how tolerant the proposed binary memristor crossbar is against the memristance variation, we tested various cases of memristance variation from 0% to 15%. In Figure 10b, we compared the proposed binary memristor crossbar circuit with the analog memristor crossbar one increasing the percentage variation in memristance from 0% to 15%.

When the memristance variation is as low as 0%, the recognition rate of the analog memristor array is higher by 6.8% than the binary memristor array. This is due to the fact that the proposed binary memristor crossbar has a 4-bit resolution; thus, it loses some amount of accuracy compared to the analog memristor crossbar. As the percentage of variation in memristance is increased, the recognition rate of analog memristor crossbar becomes degraded very rapidly. For example, when the percentage variation in memristance becomes 5%, the recognition rate of the analog crossbar is decreased from 96% to 23%. On the contrary, the binary memristor crossbar can keep almost the same amount of recognition rate for five vowels. For a percentage variation as severe as 15%, the analog crossbar shows a recognition rate as low as 9%. However, the binary crossbar still keeps the recognition rate as high as 80%, indicating that it is only degraded by 9.2% compared to the percentage variation of 0%. This strong tolerance of the binary memristor crossbar is due to the fact that the accuracy of the information stored in binary memristors can be little affected by the percentage variation in memristance. Memristance of LRS can still be much smaller and cannot become larger than that of HRS, even though the percentage variation in LRS is very large. This is the reason why the binary memristor crossbar can maintain the recognition rate over 80% regardless of the percentage variation in memristance.

## Conclusions

In this paper, the binary memristor crossbar circuit was proposed for neuromorphic application of speech recognition. Compared with analog memristors that are rare in available materials and need a complicated fabrication process, binary memristors which are based on the filamentary-switching mechanism are found more popularly and easy to be fabricated. Thus, we developed the neuromorphic crossbar circuit using filamentary-switching binary memristors instead of interface-switching analog memristors. The proposed binary memristor crossbar could recognize five vowels with 64 input channels and a 4-bit resolution. The proposed crossbar array was tested by 2,500 speech samples and verified to be able to recognize 89.2% of the total tested samples. Moreover, the recognition rate of the binary memristor crossbar is degraded very little only from 89.2% to 80%, even though the percentage statistical variation in memristance is increased from 0% to 15%. In contrast, the analog memristor crossbar is degraded significantly from 96% to 9% with the same percentage variation in memristance.

## Authors’ information

SNT and SJH are Ph.D. and M.S. students, respectively, who are studying in the School of Electrical Engineering, Kookmin University, Seoul, South Korea. KSM is a professor in the School of Electrical Engineering, Kookmin University, Seoul, South Korea.

## Declarations

### Acknowledgements

The work was financially supported by NRF-2011-220-D00089, NRF-2011-0030228, NRF-2013K1A3A1A25038533, NRF-2013R1A1A2A10064812, and BK Plus with the Educational Research Team for Creative Engineers on Material-Device-Circuit Co-Design (Grant No: 22A20130000042), funded by the National Research Foundation of Korea (NRF), and by Global Scholarship Program for Foreign Graduate Students at Kookmin Univ. The CAD tools were supported by IC Design Education Center (IDEC), Daejeon, Korea.

## Authors’ Affiliations

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## Copyright

This article is published under license to BioMed Central Ltd. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly credited.