Performance enhancement of ITO/oxide/semiconductor MOS-structure silicon solar cells with voltage biasing
© Ho et al.; licensee Springer. 2014
Received: 26 June 2014
Accepted: 26 November 2014
Published: 5 December 2014
In this study, we demonstrate the photovoltaic performance enhancement of a p-n junction silicon solar cell using a transparent-antireflective ITO/oxide film deposited on the spacing of the front-side finger electrodes and with a DC voltage applied on the ITO-electrode. The depletion width of the p-n junction under the ITO-electrode was induced and extended while the absorbed volume and built-in electric field were also increased when the biasing voltage was increased. The photocurrent and conversion efficiency were increased because more photo-carriers are generated in a larger absorbed volume and because the carriers transported and collected more effectively due to higher biasing voltage effects. Compared to a reference solar cell (which was biased at 0 V), a conversion efficiency enhancement of 26.57% (from 12.42% to 15.72%) and short-circuit current density enhancement of 42.43% (from 29.51 to 42.03 mA/cm2) were obtained as the proposed MOS-structure solar cell biased at 2.5 V. In addition, the capacitance-volt (C-V) measurement was also used to examine the mechanism of photovoltaic performance enhancement due to the depletion width being enlarged by applying a DC voltage on an ITO-electrode.
To face the threat of global warming caused by fossil fuel-based energy consumption, researchers have been encouraged to search for a viable form of energy that generates minimal CO2 emissions. Photovoltaic energy can provide a good option as a renewable source in the future because it is a clean form of energy. However, the cost per unit of electricity generated from a photovoltaic system is higher than the retail price of electricity generated by more conventional means today. Presently, the dominant photovoltaic technology is based on bulk wafer-based crystalline silicon (Si) technology. Thus, reducing the cost of Si material would be one of the first options to consider in attempting to reduce the cost of electricity generated by photovoltaic systems. However, while the cost of bulk materials used in these photovoltaic cells has steadily decreased over the past 10 years, this trend cannot continue indefinitely. On the other hand, researchers have also been trying for decades to improve the efficiency of photovoltaic devices and reduce the cost of their fabrication by using novel device structures involving relatively simple fabrication methods. In fact, a number of alternate structures have been used to achieve higher efficiency, including hetero-junction[1–3], multi-junction[4–6], metal-insulator-semiconductor (MIS)[7–9], and metal-oxide-semiconductor (MOS) solar cells[10–12]. MIS silicon solar cells are a promising candidate for the cost-effective photovoltaic devices due to the low temperature device process. The best MIS inversion-layer (MIS-IL) silicon solar cells are fabricated on p-Si substrate using an Al/SiOx/p-Si MIS tunnel contact and a SiNx/Cs ions/SiOx surface passivation and antireflection coating between the front finger electrodes. The photocurrents generated in MIS solar cells tunnel through a thin oxide layer to the Al electrode, and a high-quality thin oxide layer is required. Moreover, compared with diffused p-n junction solar cells, issues related to the critical Cs-treated processing and long-term instability interface states in MIS solar cells still need to be resolved[8, 9]. Furthermore, while the simulation and optimization of MIS-IL Si solar cells has been previously reported on, only a few studies of the use of voltage biasing effects on the MIS- or MOS-solar cells to enhance the photovoltaic efficiency have been conducted[15–18].
In this study, the novel MOS-structure silicon solar cell consisted of a conventional p-n junction semiconductor, and a transparent-antireflective ITO/oxide film was fabricated on the p-n semiconductor. The voltage biasing effects on the enhancement of photovoltaic performance were investigated, and photovoltaic performance enhancements achieved by application of the biasing voltage on the ITO-electrode were confirmed and examined using photovoltaic current-voltage (I-V) and capacitance-voltage (C-V) measurements.
The 400-μm-thick, (100) oriented, 1- to 10-Ω-cm, p-type (boron-doped), and double-sided polished Si wafer was first cut into small samples with the dimensions of 1 × 1 cm2 for bare silicon solar cell fabrication. After RCA cleaning, all of the Si samples were coated with phosphorus liquid source (provide by Emulsitone Chemicals LLC., Washington, NJ, USA) using a spin-on film (SOF) technique. In the SOF processing, all samples were spun at a speed of 6,000 rpm for 20 s, followed by a prebaking process on a hot plate at 200°C for 5 min for solvent removal and 400°C for 10 min for cross-linking. Next, the samples were capped with a 200-nm-thick SiO2 layer using e-beam evaporation and heated in a rapid thermal annealing (RTA) chamber in an N2 atmosphere at 900°C for 2 min to implement the phosphorus diffusion to obtain an n+-Si emitter. After diffusion, the samples were soaked in an HF solution to remove capped SiO2 and the phosphorus oxide layer. The phosphorus diffusion profile was confirmed by a secondary ion mass spectrometry (SIMS) measurement on a single test sample. Next, the samples were isolation-etched using KOH solution through a photolithograph process to obtain 4 × 4 mm2 individual areas. Finally, a 200-nm-thick Al film and a 20-nm-Ti/200-nm-Al film were respectively deposited on the backs and fronts of the samples using e-beam evaporation, forming front and back electrodes. After being annealed in an RTA chamber at 450°C for 15 min in an N2 atmosphere, a bare solar cell (the reference cell-1) with ohmic contact electrodes was obtained.
To characterize the performance of the MOS-structure solar cell, the optical reflectance, external quantum efficiency (EQE), photovoltaic current-voltage (I-V) under one-sun AM 1.5G illumination (100 mW/cm2, 25°C) and capacitance-voltage (C-V) of the p-n junction of the MOS-structure solar cell without application of a biasing voltage on the ITO electrode (at 0 V) were measured as a reference capacitance. Furthermore, the photovoltaic I-V and C-V values of the MOS-structure solar cell with applied biasing voltages from 0 to -2.5 V on the ITO electrode were measured and compared to the reference data. The p-n junction capacitance decreased and the short circuit current (Isc) increased as the biasing voltage on the ITO electrode was increased, indicating that the depletion width under the ITO region was enlarged and that the photo-carriers generated, transported, and collected photo-carriers more effectively due to the biasing effects.
Results and discussion
Photovoltaic performances of the MOS-structure solar cell as a function of the ITO biasing voltage
J sc (mA/cm2)
V oc (mV)
In conclusion, the J sc and η of the proposed MOS-structure solar cell with a biasing voltage were increased because more photo-carriers were generated in a largely absorbed volume and because the transport and collection of the carriers were more effectively due to the electrical biasing effects.
In this study, high performance enhancement of an ITO/oxide/p-n-semiconductor MOS-structure silicon solar cell with a voltage biasing on the ITO-electrode was experimentally demonstrated. The absorbed volume and built-in electric field in the solar cell were increased due to the biasing effects. Compared to the MOS-structure solar cell without biasing, conversion efficiency enhancement of 26.57% (from 12.42% to 15.72%) and short-circuit current density enhancement of 42.43% (from 29.51 to 42.03 mA/cm2) were obtained when the proposed MOS-structure solar cell was biased at 2.5 V.
The authors would like to thank the National Science Council of the Republic of China for financial support under Grant NSC-100-2221-E-027-053-MY3 and MOST 103-2221-E-027-049-MY3.
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