Skip to main content
Fig. 3 | Nanoscale Research Letters

Fig. 3

From: CMOS-Compatible Top-Down Fabrication of Periodic SiO2 Nanostructures using a Single Mask

Fig. 3

SEM images of the fabrication of periodic silicon nanoline arrays with 20 nm line width and 40-nm spacing. a Arrays of the resist nanoline with a width of 20 nm are patterned by e-beam lithography, and the bright area was the line. b Arrays of α-Si mask nanoline are fabricated by a precise pattern transfer in ICP etcher by Cl2/HBr/O2 plasma chemistry. c The silicon nanoline arrays are successfully fabricated by a high fidelity pattern transfer from α-Si mask and SiO2 nanotemplate, demonstrating a nearly vertical etched profile as well as the smooth sidewalls

Back to article page