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Fig. 4 | Nanoscale Research Letters

Fig. 4

From: Tunneling in Systems of Coupled Dopant-Atoms in Silicon Nano-devices

Fig. 4

Nanoscale-channel transistors with various channel designs. a SOI-FETs with a top gate and bias circuit for I D-V G measurements. Different devices have been fabricated, with different doping concentrations and profiles across the channel: b low concentration (N D ≈ 1 × 1018 cm−3)—single-electron tunneling occurs via individual P-donors (nanowire and stub-shaped channels are illustrated); c high concentration (N D ≈ 1 × 1019 cm−3)—single-electron tunneling occurs via “clusters” of P-donors

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