A multi-subband Monte Carlo study on dominance of scattering mechanisms over carrier transport in sub-10-nm Si nanowire FETs
© Ryu. 2016
Received: 5 June 2015
Accepted: 12 January 2016
Published: 27 January 2016
Dominance of various scattering mechanisms in determination of the carrier mobility is examined for silicon (Si) nanowires of sub-10-nm cross-sections. With a focus on p-type channels, the steady-state hole mobility is studied with multi-subband Monte Carlo simulations to consider quantum effects in nanoscale channels. Electronic structures of gate-all-around nanowires are described with a 6-band k · p model. Channel bandstructures and electrostatics under gate biases are determined self-consistently with Schrödinger-Poisson simulations. Modeling results not only indicate that the hole mobility is severely degraded as channels have smaller cross-sections and are inverted more strongly but also confirm that the surface roughness scattering degrades the mobility more severely than the phonon scattering does. The surface roughness scattering affects carrier transport more strongly in narrower channels, showing ∼90 % dominance in determination of the mobility. At the same channel population,  channels suffer from the surface roughness scattering more severely than  channels do, due to the stronger corner effect and larger population of carriers residing near channel surfaces. With a sound theoretical framework coupled to the spatial distribution of channel carriers, this work may present a useful guideline for understanding hole transport in ultra-narrow Si nanowires.
KeywordsSi Nanowire Scattering dominance Hole mobility Multi-subband Monte Carlo simulations Schrödinger-Poisson PACS Codes: 73.21.Hb 73.22.-f 73.50.Dn
Semiconductor devices have been continuously downscaled ever since the invention of the first transistor , leading the size of a single building block of modern devices to a few nanometers (nm). Silicon (Si) nanowires have gained attention as advanced field effect transistors (FETs) due to their enhanced control over channel electrostatics [2, 3] and as one of strong candidates for ultra-narrow interconnects [4, 5]. Solid understanding of such nanoscale devices is critical as it can accelerate potential device designs and should be always based on quantum physics since their material and electrical properties are strongly dependent on channel dispersions and quantization of subband energies [2–6].
Scattering-induced suppression of channel conductance in ultra-narrow nanowire FETs has been a particular interest to researchers, invoking theoretical studies based on Non-Equilibrium Green’s Function (NEGF) approach [7–10]. They however only focused on the scattering induced by either phonons or surface roughness due to extremely large computing loads [7–10]. Scattering-involved carrier transport in nanostructures has been also explored with multi-subband Monte Carlo (MSMC) simulations coupled to Boltzmann transport theory [11–19], which can include multiple scattering mechanisms with reasonable computing loads. Most of previous works however focused on studying electron transport [11–16]. While hole transport in nanostructures has been studied [17–19], results were limited by only including the phonon scattering under no external biases  and only focused on the mobility in 1D-confined inversion layers or double-gated structures rather than free-standing gate-all-around nanowires [18, 19].
This work presents a comprehensive theoretical study on suppression of carrier transport in extremely narrow, gate-all-around (GAA) p-type Si nanowires of sub-10-nm cross-sections. Scattering-induced degradation of the low-field hole mobility under channel modulation has been rigorously investigated with Schrödinger-Poisson and MSMC simulations. Dependency of the hole mobility on carrier densities, transport directions, and cross-section sizes of nanowire channels has been understood. Dominance of scattering mechanisms in determination of the carrier mobility has been analyzed to find the major scattering mechanism that suppresses the mobility in sub-10-nm channels. Presenting a sound theoretical framework for studying the effect of individual scattering mechanism on the mobility that has been rarely discussed based on the spatial distribution of channel carriers, this work may serve as a useful guideline for understanding hole transport in sub-10-nm ultra-narrow Si nanowires.
Electrostatics and Mobility
Channel bandstructures and electrostatics (charge and potential profiles) under gate biases are determined self-consistently with Schrödinger-Poisson simulations. Figure 1 b shows the process of our Schrödinger-Poisson loop, where a k · p Schrödinger solver runs coupled to a Poisson solver that discretizes simulation domains with finite difference method, until the potential profile converges within a criterion defined by users. Hole wavefunctions are not allowed to penetrate into the oxide layer, and therefore the charge density is assumed to be always zero inside the gate insulator for calculation of the channel potential. We note that all the simulations in this work are performed with in-house solvers, using a mean square error of 10−5 eV as a convergence criterion.
Once channel electrostatics and bandstructures are obtained from Schrödinger-Poisson simulations, the velocity of a single hole carrier is determined by solving the 1D Boltzmann transport equation with MSMC approach, where we assume that carrier transport happens under an electric field of 105 V/m, and is affected by scatterings induced by acoustic phonons, non-polar optical phonons, and channel surface roughness. The phonon and surface roughness scattering rate are calculated with the numerical model and parameters used by Ramayya et al.  and Michielis et al. , respectively, where we extracted effective masses and nonparabolicity factors of the highest 45 subbands from k · p dispersions that are obtained self-consistently, and only considered wavefunctions at Γ-point (k=0) to compute hole-scattering form factors as previous studies did [17–19]. While carrier transport can be significantly affected by the impurity coulomb scattering if nanowires have a non-negligible density of channel impurities or traps, this work ignores the effect of the impurity scattering assuming all the channels are intrinsic and free from traps, as done by previous studies [12, 13, 15]. The carrier mobility is then evaluated by taking the (time) ensemble average of velocity profiles of 3 × 105 carriers. Figure 1 c shows the overall process of simulations in detail, including the process of MSMC simulations for evaluation of the velocity of a single carrier. We note that the numerical model for the surface scattering rate employed in this work only considers surface roughness along transport directions, ignoring correlation among channel surfaces for evaluation of the scattering rate. Our results therefore may be further improved with more sophisticated models [21, 22], which consider surface roughness along both transport and confinement directions without necessarily assuming decoupled surface planes.
 and  transport-oriented GAA nanowire channels are considered assuming a room temperature and a zero flat band voltage. For each transport direction, six cross-section sizes (3, 4, 5, 6, 8, and 10 nm) are simulated under gate voltages ranging from 0 to −1 V with a step of −0.1 V. Our in-house Schrödinger-Poisson and MSMC solver run in parallel and complete the simulations in about 1 ∼4 h with 128 Intel Xeon x5570 CPUs depending on gate biases and channel sizes.
Domainance of Scattering Mechanisms
where P (PH,SRS) is the probability of scattering induced by phonons and surface roughness, respectively; μ (PH,SRS) is the mobility driven by the corresponding scattering.
Results and Discussion
Mobility of Hole Carriers
Simulation results also indicate that behaviors of the mobility depend on transport directions. To describe this dependency more clearly, we depicted the mobility in  and  channels in Fig. 2 b with a set of subplots, where each subplot shows the result at a specific cross-section size. When channels have cross-sections ≥ 8 nm × 8 nm, the mobility experiences severer degradation in  channels than  ones only if channels are inverted strongly (λ(ρ)>∼106 cm−1). In narrower channels, however, the mobility always becomes lower in  channels than  ones regardless of inversion carrier densities, where the gap between  and  mobility becomes particularly large in a 6 nm × 6 nm channel.
So far, we have discussed low-field behaviors of the hole mobility in sub-10-nm GAA Si nanowires with particular interest in their dependency on cross-section sizes, transport directions, and inversion carrier densities. However, results shown in Figs. 2 and 3 raise a question that has yet to be clearly answered in a theoretical perspective: why hole carriers generally experience severer degradation of the total and SRS-driven mobility in  channels than  ones? Reasons of this question will be pursued in further detail in the next subsection by understanding the dominance of scattering mechanisms in determination of the hole mobility.
Dominance of Scattering Mechanisms
It should be noted that previous theory works have also studied the hole mobility in ultra-narrow Si nanowires by solving the linearized Boltzmann transport equation coupled to the atomistic tight-binding approach [29, 30]. In particular, Neophytou et al.  have simulated free-standing GAA Si nanowires and have demonstrated that the mobility becomes higher in  than  nanowires and increases in  nanowires as channels become narrower, establishing a qualitative connection to the similar experimental study . While  presents good theoretical background for understanding behaviors of the hole mobility in GAA Si nanowires with results contradictory to ours, we claim that it may have underestimated the effect of SRS in  nanowires, since the increase of the hole mobility predicted by modeling is much larger than what has been observed experimentally . Moreover, another recent experimental study done by Nomura et al.  has even shown that the hole mobility generally suffers from severe degradation in narrower  channels, presenting a qualitative connection to our results and a sound evidence for underestimation of the effect of SRS in .
We have presented a comprehensive theoretical study on the degradation of the hole mobility in ultra-narrow sub-10-nm silicon (Si) nanowires. Gate-all-round (GAA) long channels are represented by supercells with a periodic boundary condition along transport directions. Bias-dependent channel bandstructures and electrostatics are determined self-consistently by solving a 6-band k · p Schrödinger equation with a Poisson equation. The low-field hole mobility is evaluated by solving a 1D Boltzmann transport equation with Monte Carlo simulations. Dominance of the phonon scattering (PH) and the surface roughness scattering (SRS) in determination of the total hole mobility is quantified with Matthiessen’s rule, where the PH-driven mobility is used as a reference to extract the SRS-driven mobility.
Here, we observe a general pattern that the mobility is severely degraded as channels become narrower and more populated and confirm SRS as the major scattering mechanism for the mobility degradation by examining its dominance in sub-10-nm narrow channels. Although  channels show higher PH-driven mobility than  channels do, the total mobility becomes lower in  channels due to the SRS-driven mobility. The reason why SRS has larger dominance in  channels than  ones is also understood by investigating the spatial distribution of channel carriers and the population of carriers residing near channel surfaces. With solid discussion for the effect of individual scattering mechanism on the hole mobility, this work expands the scope of understanding hole transport to free-standing sub-10-nm GAA Si nanowires, which has been rarely covered experimentally.
This work has been carried out with the extensive use of the TACHYON-II supercomputing cluster supported by National Institute of Supercomputing and Networking, Korea Institute of Science and Technology Information, Republic of Korea. This work has been partially supported by Intel Parallel Computing Center (IPCC) project funded by Intel Corporation, USA. Fruitful discussion with Mr. J. Jung and Prof. M. Shin in Korea Advanced Institute of Science and Technology (KAIST) is gratefully appreciated. The author would also like to express particular appreciation to J. H. Sohn for invaluable support and consistent encouragement for research.
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- Moore GE (1965) Cramming more components onto integrated circuits. Electronics38(8): 114–117.Google Scholar
- Neophytou N, Paul A, Lundstrom M, Klimeck G (2008) Bandstructure effects in silicon nanowire electron transport. IEEE Trans Elec Dev 55(6): 1286–1297.View ArticleGoogle Scholar
- Wang J, Rahman A, Ghosh A, Klimeck G, Lundstrom M (2005) Performance evaluation of ballistic silicon nanowire transistors with atomic-basis dispersion relations. Appl Phys Lett 86(9): 093113.View ArticleGoogle Scholar
- Ryu H, Lee S, Weber B, Mahapatra S, Hollenberg LCL, Simmons MY, Klimeck G (2013) Atomistic modeling of metallic nanowires in silicon. Nanoscale 5(18): 8666–8674.View ArticleGoogle Scholar
- Ryu H, Kim J, Hong KH (2015) Atomistic study on dopant-distributions in realistically sized, highly p-doped si nanowires. Nano Lett 15(1): 450–456.View ArticleGoogle Scholar
- Kishore VVR, Cukaric N, Partoens B, Tadic M, Peeters FM (2012) Hole subbands in free-standing nanowires: six-band versus eight-band k · p modelling. J Phys Condensed Matter 24(13): 135302.View ArticleGoogle Scholar
- Luisier M, Klimeck G (2009) Atomistic full-band simulations of silicon nanowire transistors: effects of electron-phonon scattering. Phys Rev B 80: 155430.View ArticleGoogle Scholar
- Kim S, Luisier M, Paul A, Boykin TB, Klimeck G (2011) Full three-dimensional quantum transport simulation of atomistic interface roughness in silicon nanowire FETs. IEEE Trans Elec Dev 58(5): 1371–1380.View ArticleGoogle Scholar
- Jung H, Shin M (2013) Surface-roughness-limited mean free path in silicon nanowire field effect transistors. IEEE Trans Elec Dev 60(6): 1861–1866.View ArticleGoogle Scholar
- Aldegunde M, Martinez A, Barker JR (2013) Study of individual phonon scattering mechanisms and the validity of Matthiessen’s rule in a gate-all-around silicon nanowire transistor. J Appl Phys 113: 014501.View ArticleGoogle Scholar
- Saint-Martin J, Bournel A, Monsef F, Chassat C, Dollfus P (2006) Multi sub-band Monte Carlo simulation of an ultra-thin double gate MOSFET with 2D electron gas. Solid State Electron 21(4): 29–31.Google Scholar
- Ramayya EB, Knezevic I (2008) Electron mobility in silicon nanowires. IEEE Trans Nanotechnol 6(1): 113–116.View ArticleGoogle Scholar
- Lenzi M, Palestri P, Gnani E, Reggiani S, Gnudi A, Esseni D, Selmi L, Baccarani G (2009) Investigation of the transport properties of silicon nanowires using deterministic and Monte Carlo approaches to the solution of the Boltzmann transport equation. IEEE Trans Elec Dev 56(9): 2081–2091.View ArticleGoogle Scholar
- Ramayya EB, Knezevic I (2010) Self-consistent Poisson-Schrödinger-Monte Carlo solver: electron mobility in silicon nanowires. J Comp Electronics 9(3): 206–210.View ArticleGoogle Scholar
- Sampedro C, Gamiz F, Godoy A, Valin R, Garcia-Loureiro A, Ruiz FG (2010) Multi-subband Monte Carlo study of device orientation effects in ultra-short channel DGSOI. Solid State Electron 54(2): 131–136.View ArticleGoogle Scholar
- Sampedro C, Donetti L, Gamiz F, Godoy A, Garcia-Ruiz FJ, Georgiev VP, Amoroso SM, Riddet C, Towie EA, Asenov A (2014) 3D multi-subband ensemble Monte Carlo simulator of FINFETs and nanowire transistors In: Proceedings of IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6931553&url=http\%3A\%2F\%2Fieeexplore.ieee.org\%2Fiel7\%2F6917163\%2F6931540\%2F06931553.pdf\%3Farnumber\%3D6931553.
- Buin AK, Verma A, Anatram MP (2008) Carrier-phonon interaction in small cross-sectional silicon nanowires. J Appl Phys 104: 053716.View ArticleGoogle Scholar
- Fischetti MV, Ren Z, Solomon PM, Yang M, Rim K (2003) Six-band k · p calculation of the hole mobility in silicon inversion layers: dependence on surface orientation, strain, and silicon thickness. J Appl Phys 94: 1079.View ArticleGoogle Scholar
- Michielis MD, Esseni D, Palestri P, Selmi L (2009) Semiclassical modeling of quasi-ballistic hole transport in nanoscale pmosfets based on a multi-subband Monte Carlo approach. IEEE Trans Elec Dev 56(9): 2081–2091.View ArticleGoogle Scholar
- Liu YX, Ting DZ-Y, McGill TC (1996) Efficient, numerically stable multiband k · p treatment of quantum transport in semiconductor heterostructures. Phys Rev B 54: 5675.View ArticleGoogle Scholar
- Jin S, Hong SM, Choi W, Lee KH, Park Y (2013) Coupled drift-diffusion (dd) and multi-subband Boltzmann transport equation (MSBTE) solver for 3D multi-gate transistors In: Proceedings of IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6650646&url=http\%3A\%2F\%2Fieeexplore.ieee.org\%2Fiel7\%2F6637582\%2F6650550\%2F06650646.pdf\%3Farnumber\%3D6650646.
- Stanojevic Z, Baumgartner O, Filipovic L, Kosina H, Karner M, Kernstock C, Prause P (2015) Consistent low-field mobility modeling for advanced MOS devices. Solid State Electron 112: 37–45.View ArticleGoogle Scholar
- Niquet YM, Nguyen VH, Triozon F, Duchemin I, Nier O, Rideau D (2014) Quantum calculations of the carrier mobility: methodology, Matthiessen’s rule, and comparison with semi-classical approaches. J Appl Phys 115: 054512.View ArticleGoogle Scholar
- Ferry DK (2000) Semiconductor Transport. Tayler & Francis Inc, New York.Google Scholar
- Iniewski K (2012) Nano-semiconductor: devices and technology. CRC Press, Florida.Google Scholar
- Pierret RF (1996) Semiconductor device fundamentals. Addison-Wesley, New York.Google Scholar
- Luisier M, Klimeck G (2010) Phonon-limited mobility and injection velocity in n- and p-doped ultrascaled nanowire field-effect transistors with different crystal orientations In: Proceedings of IEEE Electon Device Meeting (IEDM). http://ieeexplore.ieee.org/xpl/abstractAuthors.jsp?arnumber=5703324.
- Lee Y, Kakushima K, Natori K, Iwai H (2011) Corner effects on phonon-limited mobility in rectangular silicon nanowire metal-oxide-semiconductor field-effect transistors based on spatially resolved mobility analysis. J Appl Phys 109: 113712.View ArticleGoogle Scholar
- Neophytou N, Kosina H (2011) Atomistic simulations of low-field mobility in Si nanowires: influence of confinement and orientation. Phys Rev B 84: 085313.View ArticleGoogle Scholar
- Neophytou N, Kosina H (2010) Large enhancement in hole velocity and mobility in p-type  and  silicon nanowires by cross section scaling: an atomistic analysis. Nano Lett 10: 4913–4919.View ArticleGoogle Scholar
- Kobayashi M, Hiramoto T (2008) Experimental study on quantum confinement effects in silicon nanowire metal-oxide-semiconductor field-effect transistors and single-electron transistors. J Appl Phys 103: 053709.View ArticleGoogle Scholar
- Nomura H, Suzuki R, Kutsuki T, Saraya T, Hiramoto T (2012) Mechanisms of high hole mobility in (100) nanowire pmosfets with width of less than 10 nm In: Proceedings of IEEE International Conference on Ultimate Integration on Silicon (ULIS). http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6193352&url=http\%3A\%2F\%2Fieeexplore.ieee.org\%2Fxpls\%2Fabs\_all.jsp\%3Farnumber\%3D6193352.