Fig. 10From: Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) a Dry etching profile of 25 μm via. b Sealing bumps fabricate before TSV filling. c Void-free filled TSVs by X-ray inspection. d The black dots are Cu TSVs; the white area is the SiO2 region; the gray-colored area is the metal lines. e TSV cross section with Cu bumps on both sides. f Final structures of Cu bumps with TSVs [20]Back to article page