- Nano Express
- Open Access
Strained Germanium Quantum Well PMOSFETs on SOI with Mobility Enhancement by External Uniaxial Stress
© The Author(s). 2017
- Received: 21 December 2016
- Accepted: 10 February 2017
- Published: 16 February 2017
Well-behaved Ge quantum well (QW) p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) were fabricated on silicon-on-insulator (SOI) substrate. By optimizing the growth conditions, ultrathin fully strained Ge film was directly epitaxially grown on SOI at about 450 °C using ultra-high vacuum chemical vapor deposition. In situ Si2H6 passivation of Ge was utilized to form a high-quality SiO2/Si interfacial layer between the high-κ dielectric and channels. Strained Ge QW pMOSFETs achieve the significantly improved effective hole mobility μ eff as compared with the relaxed Si and Ge control devices. At an inversion charge density of Q inv of 2 × 1012 cm−2, Ge QW pMOSFETs on SOI exhibit a 104% μ eff enhancement over relaxed Ge control transistors. It is also demonstrated that μ eff of Ge pMOSFETs on SOI can be further boosted by applying an external uniaxial compressive strain.
- Quantum well
Germanium (Ge) has been attracting tremendous research interests for future pMOSFET applications due to it possesses the higher hole mobility over Si. Theoretical and experimental results proved that in order for Ge channel transistors to have significantly improved mobility and driving current over their Si and SiGe channel competitors, compressive strain is essential [1–3]. A great deal of efforts were devoted to demonstrating biaxially strained Ge-based ultrathin quantum well (QW) pMOSFETs [2, 4, 5], which have exhibited the advantages of confining hole in the undoped quantum well, eliminating dopant impurity scattering, and accommodating very high strain in channel. Nonetheless, the development of defect-free SiGe buffer with smooth surface on Si raised a major challenge for Ge devices. It was reported that, by optimizing the growth condition and controlling the film thickness precisely, fully strained Ge channel could be pseudomorphically grown directly on Si and silicon-on-insulator (SOI) [6–8]. With the low thermal budget device fabrication process, the strain in channel region was maintained, which substantially boosted the transistor performance. Studies showed that the uniaxial compressive strain is also promising for improving the mobility of Ge pMOSFETs [9–11]. However, there is still lack of the study on the combination effects between uniaxial and biaxial strain on Ge pMOSFETs.
In this paper, ultrathin strained Ge QW pMOSFETs on SOI are realized and characterized. Devices achieve the superior hole mobility to the relaxed Si and Ge control transistors. Electrical performance of Ge QW transistors is further improved by applying the external uniaxial compressive strain being parallel to channel direction.
Figure 2b shows the cross-sectional schematic of a fabricated Ge pMOSFET. Figure 2c depicts the high-resolution transmission electron microscope (HRTEM) image of metal gate stack on strained Ge channel on SOI. The thicknesses of defect-free Ge channel and HfO2 dielectric layer are 3.7 and 4.0 nm, respectively. Excellent interface quality and a uniform SiO2/Si interfacial layer (IL) are observed.
Flexure-Based Bending Setup
Before measurement, the handle Si of SOI wafer was thinned down to about 300 μm by back side polishing to make sure it can accommodate the large strain. The values of Young’s modulus for Ge along  direction is 138 GPa .
High-mobility strained Ge QW pMOSFETs with high channel crystallinity on SOI platform are realized. Devices exhibit good transfer and output characteristics and a significantly improved μ eff over Si and Ge control pMOSFETs. Ge QW pMOSFETs on SOI obtain a 104% improvement in μ eff in comparison with the relaxed Ge control transistors at a fixed Q inv of 4 × 1012 cm−2. Ge QW pMOSFETs on SOI under an external uniaxial compressive stain achieve a further μ eff enhancement, contributing to the reduced R ch and the improved drive current over the transistors without external uniaxial compressive stain.
The authors acknowledge support from the National Natural Science Foundation of China (Grant No. 61534004, 61622405, and 61604112).
YL, HW, and GH carried out the experiments and drafted the manuscript. CZ, QF, JZ, and YH provided constructive advice in the drafting. JN gave kind suggestions about the experiment. GH and YL conceived the study and participated in the experiment design. All the authors read and approved the final manuscript.
The authors declare that they have no competing interests.
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