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Fig. 2 | Nanoscale Research Letters

Fig. 2

From: Time-Shared Twin Memristor Crossbar Reducing the Number of Arrays by Half for Pattern Recognition

Fig. 2

The schematic of the proposed time-shared TMC. a The schematic of the proposed time-shared TMC for recognizing 10 images. b The detailed schematic of the time-shared subtractor of IC3. c The voltage and current waveforms of the time-shared subtractor. During the phase I, I is measured and stored at C1. During the following phase II, I+-I can be calculated from recalling the I which was measured during the previous phase I

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