Fig. 5From: Effect of Systematic Control of Pd Thickness and Annealing Temperature on the Fabrication and Evolution of Palladium Nanostructures on Si (111) via the Solid State DewettingEffect of the annealing temperature (AT) between 450 and 700 °C on the evolution of self-assembled Pd NPs with constant deposition amount of 5 nm annealed for 450 s. a–f AFM top-views of Pd NPs with the area of 3 × 3 μm2, in which the insets represent the 2-D FFT power spectra. g–h Summary plots of Rq and SAR. i EDS elemental characterization. (i-1) Enlarged spectrum showing Pd Lα1 and Pd Lß1 peaks. (i-2) Summary plot of the intensity of Pd Lα1 with respect to the annealing temperatureBack to article page