Skip to main content

A Study of the Variability in Contact Resistive Random Access Memory by Stochastic Vacancy Model


Variability in resistive random access memory cell has been one of the critical challenges for the development of high-density RRAM arrays. While the sources of variability during resistive switching vary for different transition metal oxide films, the stochastic oxygen vacancy generation/recombination is generally believed to be the dominant cause. Through analyzing experimental data, a stochastic model which links the subsequent switching characteristics with its initial states of contact RRAM cells is established. By combining a conduction network model and the trap-assisted tunneling mechanism, the impacts of concentration and distribution of intrinsic oxygen vacancies in RRAM dielectric film are demonstrated with Monte Carlo Simulation. The measurement data on contact RRAM arrays agree well with characteristics projected by the model based on the presence of randomly distributed intrinsic vacancies. A strong correlation between forming characteristics and initial states is verified, which links forming behaviors to preforming oxygen vacancies. This study provides a comprehensive understanding of variability sources in contact RRAM devices and a reset training scheme to reduce the variability behavior in the subsequent RRAM states.


Resistive random access memory (RRAM) has been regarded as a promising nonvolatile data storage solution, as a result of its desirable features, such as low power, high P/E speed, and superior compatibility with CMOS logic process [1,2,3,4]. However, there are still many obstacles to be overcome to easily implement RRAM memory arrays in current state-of-the-art CMOS circuits [5, 6]. One of the key challenges in sizable RRAM array is found in the variation existing between and within cells [7,8,9,10]. Many models and simulations have been proposed to describe the stochastic generation/recombination process of oxygen vacancy (Vo-) in transition metal oxide (TMO) film [11,12,13,14]. Kim and Brivio proposed random circuit breaker network models to emulate the typical electric characteristics of unipolar and bipolar RRAM, respectively [11, 12]. However, the resistors in these studies were all set to be constant without considering electron transportation in RRAM film. Besides, because presented models discuss stochastic processes of RRAM from a single device level instead of statistical analysis, the variability of RRAM behavior in an array are not well addressed and discussed in previous work [11,12,13,14]. Furthermore, the presence of defects in dielectric film during fabrication has been studied extensively for many years [15, 16], but its impact to resistive switching characteristics in RRAM still needs to be comprehensively analyzed for the technology to be applied in sizable memory macros. To investigate the effect of intrinsic Vo- distribution on the RRAM characteristics, a resistor network modeled on the trap-assisted tunneling mechanism is built for further statistical analysis of the variation and during operations in this study [11,12,13,14, 17]. Besides, stochastic generation process of Vo- is simulated by Monte Carlo method to establish the correlation between the RRAM in its initial states and the following forming characteristics [18,19,20]. The strong correlation between intrinsic Vo- and forming voltage is established by verifying the simulation result with measured data on contact RRAM arrays [21]. Finally, different types of conductive filament (CF) generated and resistance state variation after forming operations as a result of the intrinsic Vo- distribution are projected and investigated comprehensively. In addition, a solution for relieving the impact of preforming Vo- on variability is proposed and demonstrated in this study.


The measurement data for further statistical analysis on variability are collected from 16 × 16 contact RRAM (CRRAM) arrays which were fabricated by 28-nm CMOS logic processes, where the fabrication process of CRRAM is illustrated in Fig. 1 [21]. The resistor protection oxide (RPO) layer and interlayer dielectric (ILD) are first deposited after the front-end process is completed with the transistors formed. To construct a functional resistive switching film, proper contact hole sizing, contact size of 30 nm × 30 nm, is performed to prevent shorting the W-plug and the n + diffusion region. Finally, the barrier layer, TiN, and tungsten plug are deposited individually. The cross-sectional TEM image of CRRAM is shown in Fig. 2a. As revealed in the picture, CRRAM is serially connected with an n-channel select transistor. A 1T1R structure is adopted to ensure proper selection in an array and prevent overshoots. Figure 2b shows the composition mapping of CRRAM. Its transition metal oxide (TMO) layer, with thickness of 9 nm, composed of TiN/TiON/SiO2 stacked is formed between the top tungsten and bottom silicon electrodes. After device fabrication, electrical analysis and physical model building in this study are completed by Aglient 4156C semiconductor parameter analyzer and MATLAB software platform respectively.

Fig. 1
figure 1

Process flow of contact RRAM on a 28-nm high-k metal gate CMOS logic process platform. Smaller contact size for CRRAM is designed to control etching thickness to form functional resistive switching layer

Fig. 2
figure 2

a Cross-sectional TEM image of 1T1R CRRAM structure. b Composition mapping of CRRAM. The resistive switching film is composed of TiN/TiON/SiO2 sandwiched between the top tungsten plug and bottom Si electrode

As reported in a previous study [22], a wide distribution of initial states is found on CRRAM array. To investigate the origin of initial state variation, thicknesses of TMO layer with different initial resistances are compared in Fig. 3 first. Data suggests no significant thickness difference between the two cells with large difference in initial resistance levels. Many studies have been reported that Vo- are generated in dielectric or RRAM film during fabrication [23,24,25,26], which implies that the difference in number and density of Vo- is expected to be responsible for the initial conductivity variations.

Fig. 3
figure 3

Comparison of TMO layer thickness between two CRRAM cells with great initial resistance difference. Both cells are observed with around 9-nm dielectric layer thicknesses

Results and Discussion

Intrinsic Vacancy Distribution Model

To emulate the interactions between intrinsic Vo-, a resistor network model shown in Fig. 4a is established [11,12,13,14]. The resistances in each grid are calculated through a simulation flow outlined in Fig. 4b, while the corresponding physical parameters used are listed in Table 1. Based on TEM picture of CRRAM, a two-dimensional structure 30-nm width, 10 nm in thickness, is defined for describing the TMO layer, as shown in Fig. 5a. The resistance of the oxide site, Roxide, and mesh grid are determined by the material property of anatase-TiO2, which has been used as a resistive switching material in many studies [27,28,29,30]. Because of its tetragonal structure, the lattice constants of anatase-TiO2 vary with crystallographic axis. For the simplicity, mesh grids in our model are all set to be 1 nm by introducing the lattice constant in the c direction of anatase-TiO2 [31,32,33]. Furthermore, resistances for grids are also determined by referring the resistivity of anatase-TiO2 [34, 35]. As shown in Fig. 5a, randomly distributed Vo- are given inside the 2-D mesh initially. The temperature and electric field dependencies of CRRAM’s conduction current are summarized in Fig. 6a, b, respectively. The key characteristics of trap-assisted tunneling (TAT) current are shown by its weak-temperature effect and the linear dependency between ln(J) and 1/E [17, 36]. Using the TAT conduction model, the potential profile inside the TMO film needs to be calculated first to further obtain each localized Vo- resistance. The distribution of Vo- is expected to dominantly affect conducting current as the tunneling distance varies between oxygen vacancies. The resistance of Vo-, Rij, is then calculated by Eq. 1, which considers the probabilities of Vo- presence at the site and adopts the TAT model, for computing the tunneling probability between vacancy states.

$$ {R}_{\mathrm{ij},N}=\frac{R_{\mathrm{oxide}}}{\alpha\ {C}_{\mathrm{Vo}-}^{\kern0.75em \beta }\ \exp \left(\frac{\phi }{d}\right)} $$
Fig. 4
figure 4

a Schematic of resistor network model composed by variable localized resistance of Vo-. Nodes in this network are connected to each other to simulate the interaction between Vo-. b Variability simulation flow of initial resistance level. Stochastic distribution of intrinsic Vo- emerge during fabrication is considered by Monte Carlo method

Table 1 Simulation parameter for imitating the behavior of trap-assisted tunneling and Vo- generation process of forming operation
Fig. 5
figure 5

a Random distribution of intrinsic Vo- is initially given in RRAM film. b Localized resistance distribution of Vo- calculated by trap-assisted tunneling consideration. c Rini distribution of fresh cells collected from CRRAM arrays agrees well with the simulation data by considering TAT conduction mechanism of preforming Vo-

Fig. 6
figure 6

Conduction mechanism of CRRAM is determined by checking a temperature dependency and b electric field dependency. Trap-assisted tunneling followed by CRRAM is believed by two conduction characteristics, weak temperature dependency and linearly fitting between ln(J) and 1/E

Each Rij,N is updated in each iteration until the result converges eventually. As the final Rij distribution is obtained, as illustrated in Fig. 5b, the overall resistance, Rini, of a fresh cell can also be projected subsequently, as shown in Fig. 5c. As can be seen in Fig. 5c, the variation of simulated Rini distribution obtained by proposed simulation flow considering stochastic distribution and concentration of intrinsic Vo- agree fair well with the distribution of the Rini measured on CRRAM arrays. Therefore, randomly distributed intrinsic Vo- in TMO layers, creating multiple tunneling paths, contribute to the widely spread initial resistance found in preforming CRRAM arrays.

Analysis of Non-uniform Forming Process

After modeling causes attributed to the cell-to-cell variation in the fresh state, forming operation, initializing the resistive switching characteristics, is analyzed. The simulation flow of forming operation under DC sweep mode is shown in Fig. 7 [18,19,20]. As depicted in Fig. 8a, a cell is connected to a select transistor in series with a channel resistance of approximately 5 KΩ in linear region and a saturation current of around 80 μA. As a result of the low forming voltage, the conduction and stress mechanisms of dielectric in low electric field regime must be considered. Based on the thermal chemical model proposed in previous studies, accurate prediction of dielectric failure has been demonstrated [37,38,39,40]. Theoretical breakdown behavior of TiO2 simulated by the thermal chemical model [41] has shown similar characteristics as that observed in CRRAM. Therefore, the Vo- generation rate is obtained based on the thermal chemical model here [42,43,44]. As suggested by the thermal chemical model, the grid points beside Vo- are defined as a weak spot in the vicinity surrounding the defects. The presence of Vo- also induces localized enhanced field, shown in Fig. 8b, and accelerates the generation process of Vo- [45]. Considering the time to dielectric breakdown process in the thermal chemical model with a field dependency of exp.(−E), the probability of Vo- generation Pij is calculated by the following equation [42].

$$ {P}_{\mathrm{ij}}=\gamma\ \exp \left(\mathrm{E}\right)\ \left\{\begin{array}{c}\kern1.75em \upgamma =0,\mathrm{if}\ \mathrm{site}\ \mathrm{is}\ \mathrm{not}\ \mathrm{weak}\ \mathrm{spot}\\ {}\upgamma =1,\mathrm{if}\ \mathrm{site}\ \mathrm{is}\ \mathrm{weak}\ \mathrm{spot}\end{array}\right. $$
Fig. 7
figure 7

Simulation flow of a forming process based on the thermal chemical model, by assuming the dielectric failure time with electric field dependency of exp.(−E)

Fig. 8
figure 8

a Forming operation is simulated by a CRRAM serially connected with an ideal transistor. b Non-uniform electric potential distribution, resulting from pre-existing Vo-, induces localized field and accelerates the generation of new defects

A critical level, Pg, and a criterion, Pij > Pg, are defined for whether a new Vo- is generated. A ramping process is applied to update new Vo- distribution at each iteration until forming voltage reaches 2.7 V. Finally, with a randomly distributed intrinsic Vo-, the low resistance level Rforming after forming operation can be obtained. Based on the above model, the simulated Rforming distribution projected a wide variation, as shown in Fig. 9a, and the calculated I-V characteristics agree well with measured data. Furthermore, the correlation between forming characteristics and initial states is also investigated. Higher concentration and localized distributed Vo- accelerate the forming process. Therefore, positive correlation between forming voltage and Rini are found in both simulation results and measured data, as shown in Fig. 9b.

Fig. 9
figure 9

a Simulated resistance distribution of forming operation agrees well with measurement result. b Positive correlations between initial resistance and forming voltage are found in both measured and simulated data due to more weak points and higher electric field strength produced by preforming. Vo-

Moreover, Vo- generated in forming operation induces conductive path and result in a change of CF in cells, where the evolution of CF during forming process is depicted in Fig. 10. For cells with high Rini, there are fewer intrinsic Vo- and less weak spots, as illustrated in Fig. 10a. After the forming operation, a single conductive path is more likely to occur between the electrodes. However, growth of CF in cells with a lot of intrinsic Vo- shown in Fig. 10b tends to be more widespread; hence, dendritic CF are generated after forming. The correlation between different CF topographies and the Vo- distribution at its fresh state is also verified by measurement data. Vo- and CF in TMO layer are known to lead to distinctive random telegraph noise (RTN) during electron trapping/de-trapping process [46]. Resistance fluctuations occur if conductive path is blocked by trapped electrons, and the resistance decreases when electron de-traps. RTN analysis of CRRAM after forming is summarized in Fig. 11. Regular two-step resistance fluctuation is found in cells with high Rini, when electron trapping/detrapping takes place in a device with one dominant CF. On the other hand, multiple-level RTN is found in cells with low Rini which is expected to obstruct the dendritic CF with more than one pathway. Statistical result of RTN is summarized in Fig. 12, by analyzing RTN measurement of more than 200 CRRAM cells. Data suggests that cells with high Rini tend to exhibit only bi-level RTN, which more likely occurred in devices with one dominant CF [46,47,48,49]. The resistance variation after forming operation is arranged in Fig. 13. Data suggests that higher resistance variation are found in both measurement and simulation result in the cells with low Rini. As the less-confined CFs push the select transistor entering the saturation region early, a cell might not be properly formed, leading to a wider low-resistance state resistance levels.

Fig. 10
figure 10

Progress of CF in cell with a high initial resistance and b low initial resistance. Higher intrinsic Vo- concentration in the TMO layer results in Vo- randomly generation at weak spots. These Vo- also connect to each other to form dendritic paths

Fig. 11
figure 11

The topographies of CF in cell with a high initial resistance and b low initial resistance are analyzed by its corresponding RTN data. Occurrence of multiple resistance fluctuation in cells with low initial resistance and more intrinsic Vo- verifies the existence of dendritic CFs in TMO layer

Fig. 12
figure 12

The correlation between the initial resistance level and RTN level on CRAM cells is summarized. Higher probability of bi-level resistance fluctuation is expected to occur for cells with one dominant conductive path, which correlated strongly with cells of high Rini

Fig. 13
figure 13

Analysis of resistance level variation after forming operation is examined through both simulation and measurement. Higher variation induced by dendritic CF generation is found in cells with low initial resistance

To relieve forming variability caused by intrinsic Vo- in the TMO layer, a reset training operation, which sweeps SL to 1.4 V under a fixed WL voltage 2 V, is proposed to be applied blindly on whole memory cells in CRRAM array before forming. This operation is expected to annihilate pre-existing defects existing in cells with low Rini and to ensure a better confined CF growth during the subsequent forming process. Due to low applied voltage, there is no change in cells with high Rini after the training process. With a blanket reset training operation, the resistance of cells with low Rini, increases without disturbing the cells with high Rini, as shown in Fig. 14. Subsequently, more uniform forming characteristics can be obtained.

Fig. 14
figure 14

A blanket reset training operation is proposed to be applied on the CRRAM array. Resistance in cells with low Rini is increased by annihilating intrinsic defects, but cells with high Rini is not disturbed


A resistor network model considering the local field effect and trap-assisted tunneling conduction between Vo- has been successfully established. By Monte Carlo simulation, cell variability on its initial resistance as well as forming process is investigated. The variation in the fresh states of CRRAM can be successfully explained by a randomly given distribution of intrinsic Vo-. Projected resistance distribution after forming also agrees well with the measurement result by adopting the thermal chemical model. The growth of CF during forming is discussed and linked with variability observed in this process. Finally, a reset training operation is proposed to further relieve the forming variability caused by intrinsic Vo- in the TMO layer. A strong correlation between initial states and forming characteristics provide guidelines for new adaptive operations for future development of RRAM technologies.



Conductive filament


Contact resistive random access memory

CVo- :

Vo- concentration


Tunneling distance


Electric field


Interlayer dielectric

N :

Iteration time

P g :

Threshold switching probability

P ij :

Probability of Vo- generation

R forming :

Resistance after forming operation

R ij :

Localized resistance of Vo- site

R ini :

Initial resistance state

R oxide :

Localized resistance of oxide site


Resistor protection oxide


Resistive random access memory


Random telegraph noise


Trap-assisted tunneling


Transition metal oxide

V f :

Forming voltage

V ij :



Oxygen vacancy

α :

Fitting parameter

β :

Fitting parameter

γ :

Fitting parameter

ϕ :

Electric potential difference


  1. Yu S, Chen PY (2016) Emerging memory technologies. IEEE Solid-State Circuits Mag 8:43–56

    Article  Google Scholar 

  2. Wong HSP, Lee HY, Yu S, Chen YS, Wu Y, Chen PS, Lee B, Chen FT, Tsai MJ (2012) Metal-Oxide RRAM. Proc IEEE 100:1951–1970

    Article  Google Scholar 

  3. Wu Y, Lee B, Wong HSP (2010) Ultra-Low Power Al2O3-based RRAM with 1μA Reset Current. Symp. VLSI-TSA, pp 136–137

    Google Scholar 

  4. Lee HY, Chen PS, Wu TY, Chen YS, Wang CC, Tzeng PJ, Lin CH, Chen F, Lien CH, Tsai MJ (2008) Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM. IEDM Tech Dig, pp 297–300

    Google Scholar 

  5. Lee J, Park J, Jung S, Hwang H (2011) Scaling effect of device area and film thickness on electrical and reliability characteristics of RRAM, Proc IEEE Int Interconnect Technol Conf (IITC), pp 1–4

    Google Scholar 

  6. Chang MF, Chiu PF, Sheu SS (2011) Circuit design challenge in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC, Proc. IEEE Asia South Pacific Design Automation Conference (ASP-DAC), pp 197–202

    Google Scholar 

  7. Balatti S, Ambrogio S, Wang ZQ, Sills S, Calderoni A, Ramaswamy N, Ielmini D (2015) Understanding pulsed-cycling variability and endurance in HfOx RRAM, Proc. IEEE Int. Rel. Phys. Symp, pp 5B.3.1–5B.3.6

    Google Scholar 

  8. Balatti S, Ambrogio S, Gilmer DC, Ielmini D (2013) Set variability and failure induced by complementary switching in bipolar RRAM. IEEE Electron Device Lett 34:861–863

    Article  Google Scholar 

  9. Pouyan P, Amat E, Hamdioui S, Rubio A (2016) RRAM variability and its mitigation schemes, International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp 141–146

    Google Scholar 

  10. Chen A, Lin MR (2011) Variability of resistive switching memories and its impact on crossbar array performance, IEEE International Reliability Physics Symp, pp MY.7.1–MY.7.4

    Google Scholar 

  11. Kim K, Yoon SJ, Choi WY (2014) Dual random circuit breaker network model with equivalent thermal circuit network. Appl Phys Express 7:024203

    Article  Google Scholar 

  12. Brivio S, Spiga S (2017) Stochastic circuit breaker network model for bipolar resistance switching memories. J Comput Electron 16:1154–1166

    Article  Google Scholar 

  13. Chae SC, Lee JS, Kim S, Lee SB, Chang SH, Liu C, Kahng B, Shin H, Kim DW, Jung CU, Seo S, Lee MJ, Noh TW (2008) Random circuit breaker network model for unipolar resistance switching. Adv Mater 20:1154–1159

    Article  Google Scholar 

  14. Chang SH, Lee JS, Chae SC, Lee SB, Liu C, Kahng B, Kim DW, Noh TW (2009) Occurrence of both unipolar memory and threshold resistance switching in a NiO film. Phys Rev Lett 102:026801

    Article  Google Scholar 

  15. Kusaka T, Ohji Y, Mukai K (1987) Time-dependent dielectric breakdown of ultra-thin silicon oxide. IEEE Electron Device Lett 8:61–63

    Article  Google Scholar 

  16. Lee JC, Chen IC, Hu C (1988) Modeling and characterization of gate oxide reliability. IEEE Trans Electron Devices 35:2268–2278

    Article  Google Scholar 

  17. Yu S, Guan X, Wong HSP (2011) Conduction mechanism of TiN/HfOx/Pt resistive switching memory: a trap-assisted-tunneling model. Appl Phys Lett 99:063507

    Article  Google Scholar 

  18. Yu S, Chen YY, Guan X, Wong HSP, Kittl JA (2012) A Monte Carlo study of the low resistance state retention of HfOx based resistive switching memory. Appl Phys Lett 100:043507

    Article  Google Scholar 

  19. Yu S, Guan X, Wong HSP (2012) Understanding metal oxide rram current overshoot and reliability using kinetic Monte Carlo simulation. IEEE IEDM Tech Dig 26(1):1–26.1.4

    Google Scholar 

  20. Yu S, Guan X, Wong HSP (2011) On the stochastic nature of resistive switching in metal oxide rram: physical modeling, Monte Carlo simulation, and experimental characterization. IEEE IEDM Tech Dig 17(3):1–17.3.4

    Google Scholar 

  21. Shen WC, Mei CY, Chih YD, Sheu SS, Tsai MJ, King YC, Lin CJ (2012) High-K metal gate contact RRAM (CRRAM) in pure 28 nm CMOS logic process. IEEE IEDM Tech Dig 31(6):1–31.6.4

    Google Scholar 

  22. Kao YF, Hsieh WT, Chen CC, King YC, Lin CJ (2017) Statistical analysis of the correlations between cell performance and its initial states in contact resistive random access memory cells. Jpn J Appl Phys 56:04CE08

    Article  Google Scholar 

  23. Pan X, Yang MQ, Fu X, Zhang N, Xu YJ (2013) Defective TiO2 with oxygen vacancies: synthesis, properties and photocatalytic applications. Nano 5:3601–3614

    Google Scholar 

  24. Nicklaw CJ, Lu ZY, Fleetwood DM, Schrimpf RD, Pantelides ST (2002) The structure, properties, and dynamics of oxygen vacancies in amorphous SiO2. IEEE Trans Nucl Sci 49:2667–2673

    Article  Google Scholar 

  25. Buh GH, Hwang I, Park BH (2009) Time-dependent electroforming in NiO resistive switching devices. Appl Phys Lett 95:142101

    Article  Google Scholar 

  26. Xu N, Liu L, Sun X, Liu X, Han D, Wang Y, Han R, Kang J, Yu B (2008) Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistance switching random-access memories. Appl Phys Lett 92:232112

    Article  Google Scholar 

  27. Acharyya D, Hazra A, Bhattacharyya P (2014) A journey towards reliability improvement of TiO2 based resistive random access memory: a review. Microelectron Reliab 54:541–560

    Article  Google Scholar 

  28. Hu C, McDaniel MD, Posadas A, Demkov AA, Ekerdt JG, Yu ET (2014) Highly controllable and stable quantized conductance and resistive switching mechanism in single-crystal TiO2 resistive memory on silicon. Nano Lett 14:4360–4367

    Article  Google Scholar 

  29. Cheng CH, Chin A (2013) Nano-crystallized titanium oxide resistive memory with uniform switching and long endurance. Appl Phys A Mater Sci Process 111:203–207

    Article  Google Scholar 

  30. Liu C, Gao B, Huang P, Kang J (2017) Microstructure evolution characteristics induced by oxygen vacancy generation in anatase TiO2 based resistive switching devices. Semicond Sci Technol 32:035018

    Article  Google Scholar 

  31. Diebold U (2002) The surface science of titanium dioxide. Surf Sci Rep 48:53–229

    Article  Google Scholar 

  32. Treacy JPW, Hussian H, Torrelles X, Grinter DC, Cabailh G, Bikondoa O, Nicklin C, Selcuk S, Selloni A, Lindsay R, Thornton G (2017) Geometric structure of anatase TiO2 (101). Phys Rev B 95:075416

    Article  Google Scholar 

  33. Budett JK, Hughbanks T, Miller GJ, Richardson JW, Smith JV (1987) Structure-electronic relationships in inorganic solids: powder neutron diffraction studies of the rutile and anatase polymorphs of titanium dioxide at 15 and 295 K. J Am Chem Soc 109:3639–3646

    Article  Google Scholar 

  34. Tachikawa T, Minohara M, Nakanishi Y, Hikita Y, Yoshita M, Akiyama H, Bell C, Hwang HY (2012) Metal-to-insulator transition in anatase TiO2 thin films induced by growth rate modulation. Appl Phys Lett 101:022104

    Article  Google Scholar 

  35. Tang H, Prasad K, Sanjines R, Schmid PE, Levy F (1994) Electrical and optical properties of TiO2 anatase thin films. J Appl Phys 75:2042–2047

    Article  Google Scholar 

  36. Lim EW, Ismail R (2015) Conduction mechanism of valence change resistive switching memory: a survey. Electronics 4:586–613

    Article  Google Scholar 

  37. McPherson JW, Khamankar RB (2000) Molecular model for intrinsic time-dependent dielectric breakdown in SiO2 dielectrics and the reliability implications for hyper-thin gate oxide. Semicond Sci Technol 15:462–470

    Article  Google Scholar 

  38. McPherson JW, Reddy V, Banerjee K, Le H (1998) Comparison of E and 1/E TDDB models for SiO2 under long-term/low-field test conditions. IEEE IEDM Tech Dig 7(3):1–7.3.4

    Google Scholar 

  39. McPherson JW (2012) Time dependent dielectric breakdown physics-models revisited. Microelectron Reliab 52:1753–1760

    Article  Google Scholar 

  40. Cheung KP (2001) Unifying the thermal-chemical and anode-hole-injection gate-oxide breakdown models. Microelectron Reliab 41:193–199

    Article  Google Scholar 

  41. McPherson JW, Kim J, Shanware A, Mogul H, Rodriguez J (2003) Trends in ultimate breakdown strength of high dielectric-constant materials. IEEE Trans Electron Devices 50:1771–1778

    Article  Google Scholar 

  42. McPherson JW, Mogul HC (1998) Underlying physics of the thermochemical E model in describing low-field time-dependent dielectric breakdown in SiO2 thin films. J Appl Phys 84:1513–1523

    Article  Google Scholar 

  43. Wong TKS (2012) Time dependent dielectric breakdown in copper low-K interconnects: mechanisms and reliability model. Materials 5:1602–1625

    Article  Google Scholar 

  44. Bersuker G, Korkin A, Fonseca L, Safonov A, Bagatur’yants A, Huff HR (2003) The role of localized states in the degradation of thin gate oxides. Microeletron Eng 69:118–129

    Article  Google Scholar 

  45. Niemeyer L, Pietronero L, Wiesmann HJ (1984) Fractal dimension of dielectric breakdown. Phys Rev Lett 52:1033–1036

    Article  Google Scholar 

  46. Tseng YH, Shen WC, Huang CE, Lin CJ, King YC (2010) Electron trapping effect on the switching behavior of contact RRAM devices through random telegraph noise analysis, IEEE IEDM Tech Dig, pp 28.5.1–28.5.4

    Google Scholar 

  47. Puglisi FM, Pavan P (2014) Factorial hidden Markov model analysis of random telegraph noise in resistive random access memories. ECTI Trans Electr Eng, Electron Commun 12:24–29

    Google Scholar 

  48. Puglisi FM, Pavan P (2013) RTN analysis with FHMM as a tool for multi-trap characterization in HfOx RRAM, Proc. IEEE Int. Conf. Electron Devices Solid-State Circuits, pp 1–2

    Google Scholar 

  49. Awano H, Tsutsui H, Ochi H, Sato T (2012) Bayesian estimation of multi-trap RTN parameters using Markov chain Monte Carlo method. IEICE Trans Fundam Electron Commun Comput Sci E95-A:2272–2283

    Article  Google Scholar 

Download references


The authors would like to thank the support from the Ministry of Science and Technology (MOST), Taiwan, and Taiwan Semiconductor Manufacturing Company (TSMC).


This study is supported by the Ministry of Science and Technology (MOST) and the Taiwan Semiconductor Manufacturing Company (TSMC).

Availability of Data and Materials

The datasets supporting the conclusions of this article are included within the article.

Author information

Authors and Affiliations



Y-FK carried out the device measurement, analysis, and model building. The simulation program building was supported by WCZ. C-JL and Y-CK conceived of this study and carried out manuscript modification. All authors read and approved the final manuscript.

Corresponding author

Correspondence to Ya-Chin King.

Ethics declarations

Competing Interests

The authors declare that they have no competing interests.

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Open Access This article is distributed under the terms of the Creative Commons Attribution 4.0 International License (, which permits unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made.

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Kao, YF., Zhuang, W.C., Lin, CJ. et al. A Study of the Variability in Contact Resistive Random Access Memory by Stochastic Vacancy Model. Nanoscale Res Lett 13, 213 (2018).

Download citation

  • Received:

  • Accepted:

  • Published:

  • DOI:


  • RRAM
  • Variability
  • Stochastic model
  • Monte Carlo simulation
  • Trap-assisted tunneling