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Germanium Negative Capacitance Field Effect Transistors: Impacts of Zr Composition in Hf1−xZrxO2


Germanium (Ge) negative capacitance field-effect transistors (NCFETs) with various Zr compositions in Hf1−xZrxO2 (x = 0.33, 0.48, and 0.67) are fabricated and characterized. For each Zr composition, the NCFET exhibits the sudden drop in some points of subthreshold swing (SS), which is induced by the NC effect. Drive current IDS increases with the increase of annealing temperature, which should be due to the reduced source/drain resistance and improved carrier mobility. The steep SS points are repeatable and stable through multiple DC sweeping measurement proving that they are induced by the NC effect. The values of gate voltage VGS corresponding to steep SS are consistent and clockwise IDS-VGS are maintained through the multiple DC sweeps. At fixed annealing temperature, NC device with Hf0.52Zr0.48O2 achieves the higher IDS but larger hysteresis compared to the other compositions. NCFET with Hf0.67Zr0.33O2 can obtain the excellent performance with hysteresis-free curves and high IDS.


The ferroelectric negative capacitance field-effect transistor (NCFET) with a ferroelectric film inserted into gate stack is a promising candidate for the low-power dissipation applications owing to its ability to overcome the fundamental limitation in subthreshold swing (SS) for the conventional metal-oxide-semiconductor field-effect transistor (MOSFET) [1]. The negative capacitance (NC) phenomena in NCFETs have been extensively studied in different channel materials, including silicon (Si) [2, 3], germanium (Ge) [4], germanium-tin (GeSn) [5], III–V [6], and 2D materials [7]. Also, the NC characteristics have been demonstrated in NCFETs with various ferroelectrics, such as BiFeO3 [8], PbZrTiO3 (PZT) [9], PVDF [10], and Hf1−xZrxO2 [11]. Compared to other ferroelectrics, Hf1−xZrxO2 has the advantage of being compatible with CMOS integration. Experimental studies have shown that the electrical performance of NCFETs can be optimized by varying the thickness and area of Hf1−xZrxO2, which affects the matching between MOS capacitance (CMOS) and ferroelectric capacitance (CFE) [12, 13]. It is expected that the Zr composition in Hf1−xZrxO2 also has a great impact on the performance of NCFETs, because it determines the ferroelectric properties of Hf1−xZrxO2. However, there is still a lack of a detailed study on the impacts of Zr composition on the electrical characteristics of NCFETs.

In this paper, we comprehensively study the influences of the annealing temperature and the Zr composition on the performance of Ge NCFET.


Key process steps for fabricating Ge p-channel NCFETs with the different Zr compositions in Hf1−xZrxO2 are shown in Fig. 1(a). After the pregate cleaning, n-Ge (001) substrates were loaded into the atom layer deposition (ALD) chamber. A thin Al2O3 (25 cycles) film was deposited, which was followed by the O3 passivation. Then, the Hf1-xZrxO2 films (x = 0.33, 0.48 and 0.67) were deposited in the same ALD chamber using [(CH3)2N]4Hf (TDMAHf), [(CH3)2N]4Zr (TDMAZr) and H2O as the Hf, Zr, and O precursors, respectively. After that, the TaN metal gate was deposited using the reactive sputtering. After gate patterning and etching, boron ions (B+) were implanted into source/drain (S/D) regions at an energy of 20 keV and a dose of 1 × 1015 cm−2. Non-self-aligned S/D metals were formed by lift-off process. Finally, rapid thermal annealing (RTA) was carried out at various temperatures for dopant activation, S/D metallization, and crystallization of Hf1−xZrxO2 film. Ge control pMOSFETs with the Al2O3/HfO2 stack was also fabricated.

Fig. 1
figure 1

(a) Key process steps for the fabrication of Ge NCFETs with the different Zr compositions in Hf1−xZrxO2 ferroelectrics. (b) Schematic of the fabricated NC transistor. (c) TEM image of the gate stack of NC device illustrating the 7 nm H0.52Zr0.48O2 layer and 2 nm Al2O3 layer

Figure 1(b) shows the schematic of the fabricated NCFET. High-resolution transmission electron microscope (HRTEM) image in Fig. 1(c) shows the gate stack on Ge channel of device with Hf0.52Zr0.48O2 ferroelectric. The thicknesses of Al2O3 and Hf0.52Zr0.48O2 layers are 2 nm and 7 nm, respectively.

To confirm the stoichiometries of Hf1−xZrxO2, the X-ray photoelectron spectroscopy (XPS) measurement was carried out. Figure 2(a) and (b) show the Hf4f and Zr3d photoelectron core level spectra, respectively, for the Hf0.67Zr0.33O2, Hf0.52Zr0.48O2, and Hf0.33Zr0.67O2 films. The material compositions were calculated based on the area ratio of the peaks and the corresponding sensitivity factors. The two peaks of Zr3d5/2 and Zr3d3/2 have a spin-orbital splitting of 2.4 eV, which is consisted with Refs. [14, 15]. With the increment of Zr composition in Hf1−xZrxO2, Zr3d, and Hf4f peaks shift to the lower energy direction.

Fig. 2
figure 2

(a) Hf 4f and (b) Zr 3d core level spectra for the Hf1−xZrxO2 samples with the different Zr compositions

The ferroelectric properties of the Hf1−xZrxO2 films (x = 0.33, 0.48, and 0.66) were characterized by the polarization P vs. drive voltage V hysteresis loops measurement. P-V loops were recorded on the pristine devices. Figure 3 shows the curves of P vs. V for TaN/Hf1−xZrxO2(10 nm)/TaN samples in a series of drive voltages. With the post-annealing temperature increases from 500 to 550 °C, the P-V curves of the Hf1−xZrxO2 tend to be saturated in a sub-loop state. As the Zr composition increases, the remnant polarization of the film is obviously improved, and the thinning of the hysteresis loop at zero bias is observed, which can be phenomenologically best described as superimposed antiferroelectric-like characteristics [16, 17].

Fig. 3
figure 3

Measured P-V curves of the Hf1-xZrxO2 films with different Zr compositions annealed at 500 and 550 oC. (a) and (b) are the Hf0.67Zr0.33O2 film annealed at 500 and 550 oC, respectively. (c) and (d) are the Hf0.52Zr0.48O2 film annealed at 500 and 550 oC, respectively. (e) and (f) are the Hf0.33Zr0.67O2 film annealed at 500 and 550 oC, respectively. With the post annealing temperature increases from 500 to 550 oC, the P-V curves of the Hf1-xZrxO2 tend to be saturated in a sub-loop state. An evolution ferroelectric to an antiferroelectric-like behavior is observed with the Zr composition increased

Results and Discussion

Figure 4(a) shows the measured transfer characteristics of Ge NCFETs with Hf0.52Zr0.48O2 ferroelectrics with different annealing temperatures and control device with Al2O3/HfO2 stack dielectric. The control device was annealed at 500 °C. All the devices have a gate length LG of 2 μm. The forward and reverse sweeping are indicated by the open and solid symbols, respectively. The NCFETs have a much higher drive current compared to the control device. It is seen that, with the annealing temperature increasing from 450 to 550 °C, the threshold voltage VTH of the NC devices shift to the positive VGS direction. The NCFETs exhibit a small hysteresis, which becomes negligible with the increasing of RTA temperature. The trapping effect also leads to the hysteresis, but that produces the counterclockwise IDS-VGS loop, opposite to the results induced by ferroelectric switching [18]. Point SS vs. IDS curves in Fig. 4(b) show that the NC transistor exhibits the sudden drop in some points of SS, corresponding to the abrupt change of IDS induced by the NC effect [19]. It is observed that NCFETs achieve the improved SS characteristics compared to the control device. We found that the sudden drop points of the devices are consistent at the different annealing temperatures. The measured IDS-VDS curves of the NCFETs with Hf0.52Zr0.48O2 ferroelectric annealed at different temperatures are shown in Fig. 4(c). IDS-VDS curves of the NC transistor show the obvious NDR phenomenon, which is a typical characteristic of NC transistors [20,21,22,23]. Figure 4(d) is the plots of the IDS of the Ge NCFETs with the Hf0.52Zr0.48O2 ferroelectric layer annealed at 450, 500, and 550 °C, respectively, at VDS = − 0.05 V and − 0.5 V, and |VGS − VTH| = 1.0 V. Here, the VTH is defined as the VGS at IDS of 10−7 A/μm. IDS increases with the increasing of RTA temperature, which is due to the reduced source/drain resistance and improved carrier mobility at the higher annealing temperature.

Fig. 4
figure 4

(a) Measured IDS-VGS curves for NCFETs with Hf0.52Zr0.48O2 ferroelectric and control device. (b) Point SS vs. IDS curves showing that NCFETs have the steeper SS compared to control MOSFET. (c) IDS-VDS curves for the NCFETs demonstrating the typical NDR phenomena. (d) Comparison of the IDS for the NCFETs annealed at various temperatures at a gate overdrive of 1 V

In addition to the Hf0.52Zr0.48O2 ferroelectric transistor, we also investigate the electrical characteristics of Ge NC transistors with the Hf0.33Zr0.67O2 ferroelectric. Figure 5(a) presents the IDS-VGS characteristics of the devices with Hf0.33Zr0.67O2 with the different annealing temperatures at VDS = − 0.05 V and − 0.5 V. Compared to the Hf0.52Zr0.48O2 NC transistors, even smaller hysteresis is obtained. Similar to the Hf0.52Zr0.48O2 NC transistors, as the annealing temperature increases from 450 to 550 °C, VTH of the device increase from − 0.63 V to 0.51 V in the forward sweeping at VDS = − 0.05 V. Point SS as a function of IDS characteristics for the Hf0.33Zr0.67O2 ferroelectric NCFETs are depicted in Fig. 5(b). In addition, devices with 450 °C and 500 °C annealing temperature obtains the more obvious sudden drop in SS in comparison with the 550 °C annealed transistor. The sudden drop points in different annealing temperatures occur at the same gate voltage. Figure 5(c) exhibits forward and reverse IDS of the Hf0.33Zr0.67O2 NCFETs at VDS = − 0.05 V and − 0.5 V, and |VGSVTH| = 1.0 V. Whether for the forward or reverse sweeping, the IDS increases with the annealing temperature, which is consistent with the characteristic of the Hf0.52Zr0.48O2 device.

Fig. 5
figure 5

(a) Measured transfer characteristics of the Hf0.33Zr0.67O2 NC Ge pFETs annealed from 450 to 550 °C. (b) Point SS as a function of IDS for the Hf0.33Zr0.67O2 devices. (c) IDS for the ferroelectric NC transistors with different annealing temperatures at a gate overdrive of 1 V 

We also investigate the electrical performance of Ge NCFET with the smaller Zr composition. The transfer characteristics of the Hf0.67Zr0.33O2 NCFETs annealed at different annealing temperatures are presented in Fig. 6(a). No hysteresis phenomenon is observed. Compared to Hf0.33Zr0.67O2 and Hf0.52Zr0.48O2 devices, the VTH shift induced by varying annealing temperature is less pronounced in Hf0.67Zr0.33O2 NCFETs. Point SS vs. IDS curves in Fig. 6(b) show that the Hf0.67Zr0.33O2 NC transistor exhibits the sudden drop in some points of SS of NC transistor at VDS = − 0.05 V. Figure 6(c) presents the IDS of Hf0.67Zr0.33O2 Ge NCFETs annealed at 450 °C, 500 °C, and 550 °C, at VDS = − 0.05 V and − 0.5 V, and |VGSVTH| = 1.0 V. Likewise, IDS enhances as the RTA temperature increases.

Fig. 6
figure 6

(a) Measured IDS-VGS of the Hf0.67Zr0.33O2 NC Ge pFETs annealed at 450 °C, 500 °C, and 550 °C. (b) Point SS vs. IDS characteristics of the devices. (c) IDS for the ferroelectric NC transistors with different annealing temperatures at a gate overdrive of 1 V

The stability of the NC effect induced by the ferroelectric layer of the Hf0.52Zr0.48O2 NCFET was verified by multiple DC sweeping measurements. The measured IDS-VGS curves over 100 cycles of DC sweeping are shown in Fig. 7(a). It can be seen that the values of VGS corresponding to steep SS are consistent. In addition, the clockwise I-V loops are maintained through the multiple DC sweeps. The steep SS points are repeatable and stable through multiple DC sweeps, which further proves that they are induced by the NC effect. Figure 7(b) presents the best point SS and drive current across the number of sweeping cycles. Figure 7(c) shows the hysteresis characteristics as a function of the number of DC sweeping cycles. Stable I-V hysteresis window of ~ 82 mV are seen.

Fig. 7
figure 7

(a) Measured IDS-VGS curves of a Hf0.52Zr0.48O2 NC Ge pFET over 100 cycles of DC sweeping. (b) Best point SS and IDS vs. cycle number. (c) Hysteresis characteristics as a function of the number of DC sweeping cycles

We summarize the hysteresis and drive current characteristics of Ge NCFETs with different Zr compositions in Hf1−xZrxO2 in Fig. 8. As shown in Fig. 8(a), the hysteresis values are 70, 148, and 106 mV for devices with x = 0.33, 0.48, and 0.67, respectively, at a VDS of – 0.5 V. As the composition increases from 0.33 to 0.48, the hysteresis of the NC device increases significantly. With the further increasing of Zr composition, the hysteresis decreases rapidly. The IDS of NCFETs annealed at 450 °C is plotted in Fig. 8(b), at VDS = − 0.5 V and VGS − VTH = − 1.0 V. Open and solid represent the forward and reverse sweeping, respectively. The NC device with Hf0.52Zr0.48O2 achieves the highest IDS, but its hysteresis is serious. NCFET with Hf0.67Zr0.33O2 can obtain excellent performance with hysteresis-free curves and high IDS. As Zr composition increases, the ferroelectric capacitance Cfe (= 0.3849*Pr/(Ec*tfe) [24]) increases with the increasing of Pr, and meanwhile, the MOS capacitance (CMOS) rises as well due to the growing permittivity of the HZO film. The IDS and hysteresis are determined by |Cfe| and CMOS of the transistor. With Zr composition increasing from 0.33 to 0.48, the increase of |Cfe| is speculated to be slower than does the CMOS, leading to the widening of the hysteresis. Nevertheless, the larger CMOS produces a higher IDS. With the further increase of Zr composition, the increase of |Cfe| is faster than CMOS, which might provide |Cfe| ≥ CMOS, reducing the hysteresis of NCFET.

Fig. 8
figure 8

Statistical plots of (a) hysteresis and (b) IDS of Ge NCFET with Hf1−xZrxO2 (x = 0.33, 0.48, and 0.67)


The impacts of the annealing temperature and Zr composition in Hf1−xZrxO2 on the electrical performance of the Ge NCFETs are experimentally studied. The stoichiometries and ferroelectric properties of Hf1−xZrxO2 were confirmed by XPS and P-V measurements, respectively. NCFETs demonstrate the steep point SS and improved IDS compared to the control device, due to the NC effect. The VTH and IDS of the Hf1−xZrxO2 NCFET are greatly affected by the annealing temperature. Multiple DC sweeping measurements show that the stability of the NC effect induced by the ferroelectric layer is achieved in NCFET. Hf0.67Zr0.33O2 NCFET can more easily achieve the hysteresis-free characteristics than the devices with higher Zr composition.


Al2O3 :

Aluminum oxide


Atomic layer deposition

BF2 + :

Boron fluoride ion


Direct current



GeOx :

Germanium oxide


Hydrofluoric acid

HfO2 :

Hafnium dioxide


High-resolution transmission electron microscope


Metal-oxide-semiconductor field-effect transistors


Negative capacitance




Subthreshold swing


Tantalum nitride


Tetrakis (dimethylamido) hafnium


Tetrakis (dimethylamido) zirconium


  1. Salahuddin S, Datta S (2008) Use of negative capacitance to provide voltage amplification for low power nanoscale devices. Nano Lett 8:405–410

    CAS  Article  Google Scholar 

  2. Lee MH, Chen P-G, Liu C, Chu C-Y, Cheng C-C, Xie M-J, Liu S-N, Lee J-W, Huang S-J, Liao M-H, Tang M, Li K-S, Chen M-C (2015) Prospects for ferroelectric HfZrOx FETs with experimentally CET=0.98nm, SSfor=42 mV/dec, SSrev=28 mV/dec, switch-off <0.2 V, and hysteresis-free strategies. In: IEDM Tech. Dig., pp 616–619

    Google Scholar 

  3. Li K-S, Chen P-G, Lai T-Y, Lin C-H, Cheng C-C, Chen C-C, Wei Y-J, Hou Y-F, Liao M-H, Lee M-H, Chen M-C, Sheih J-M, Yeh W-K, Yang F-L, Salahuddin S, Hu C (2015) Sub-60mV-swing negative-capacitance FinFET without hysteresis. In: IEDM Tech. Dig., pp 620–623

    Google Scholar 

  4. Zhou J, Han G, Li Q, Peng Y, Lu X, Zhang C, Zhang J, Sun Q-Q, Zhang D-W, Hao Y (2016) Ferroelectric HfZrOx Ge and GeSn pMOSFETs with sub-60 mV/decade subthreshold swing, negligible hysteresis, and improved I DS. In: IEDM Tech. Dig., pp 395–339

    Google Scholar 

  5. Zhou J, Han G, Peng Y, Liu Y, Sun Q-Q, Zhang D-W, Hao Y (2017) Ferroelectric negative capacitance GeSn pFETs with sub20 mV/decade subthreshold swing. IEEE Electron Device Lett 38:1157–1160

    CAS  Article  Google Scholar 

  6. Luc QH, Fan-Chiang CC, Huynh SH, Huang P, Do HB, Ha MTH, Jin YD, Nguyen TA, Zhang KY, Wang HC, Lin YK, Lin YC, Hu C, Iwai H, Chang EY (2018) First experimental demonstration of negative capacitance InGaAs MOSFETs with Hf0.5Zr0.5O2 ferroelectric gate stack. In: Symp. VLSI Technol., pp 47–48

    Google Scholar 

  7. Wei M, Chunsheng S, Wonil J, Yuchen C, Muhammad D, AlamPeide A, Ye D (2018) Steep-Slope WSe2 Negative Capacitance Field-Effect Transistor. Nano Lett 18:3682–3687

    Article  Google Scholar 

  8. Khan AI, Chatterjee K, Duarte JP, Lu Z, Sachid A, Khandelwal S, Ramesh R, Hu C, Salahuddin S (2016) Negative capacitance in short-channel FinFETs externally connected to an epitaxial ferroelectric capacitor. IEEE Electron Device Lett. 37:111–114

    Article  Google Scholar 

  9. Dasgupta S, Rajashekhar A, Majumdar K, Agrawal N, Razavieh A, Trolier-Mckinstry S, Datta S (2015) Sub-kT/q switching in strong inversion in PbZr0.52Ti0.48O3 gated negative capacitance FETs. IEEE J Exploratory Solid-State Comput Devices Circuits 1:43–48

    Article  Google Scholar 

  10. Rusu A, Salvatore GA, Jiménez D, Ionescu AM (2010) Metal-ferroelectric-metal-oxide-semiconductor field effect transistor with sub-60mV/decade subthreshold swing and internal voltage amplification. In: IEDM Tech. Dig., pp 395–398

    Google Scholar 

  11. Cheng CH, Chin A (2014) Low-voltage steep turn-on pMOSFET using ferroelectric high-κ gate dielectric. IEEE Electron Device Lett 35:274–276

    CAS  Article  Google Scholar 

  12. Li J, Zhou J, Han G, Liu Y, Peng Y, Zhang J, Sun Q-Q, Zhang DW, Hao Y (2018) Negative capacitance Ge PFETs for performance improvement: impact of thickness of HfZrOx. IEEE Trans Electron Devices 65:1217–1222

    CAS  Article  Google Scholar 

  13. Zhou J, Han G, Li J, Peng Y, Liu Y, Zhang J, Sun Q-Q, Zhang DW, Hao Y (2017) Comparative study of negative capacitance Ge PFETs with HfZrOx partially and fully covering gate region. IEEE Trans Electron Devices 64:4838–4843

    CAS  Article  Google Scholar 

  14. Heo S, Tahir D, Chung JG, Lee JC, Kim KH, Lee J, Lee H-I, Park GS, Oh SK, Kang HJ, Choi P, Choi B-D (2015) Band alignment of atomic layer deposited (HfZrO4)1-x(SiO2)x gate dielectrics on Si (100). Appl Phys Lett 107:182101

    Article  Google Scholar 

  15. Triyoso DH, Hedge RI, Schaeffer JK, Roan D, Tobin PJ, Samavedam SB, White BE Jr, Gregory R, Wang XD (2006) Impact of Zr addition on properties of atomic layer deposited HfO2. Appl Phys Lett 88:222901

    Article  Google Scholar 

  16. Müller J, Böscke TS, Schröder U, Mueller S, Bräuhaus D, Böttger U, Frey L, Mikolajick T (2012) Ferroelectricity in simple binary ZrO2 and HfO2. Nano Lett 12:4318–4323

  17. Park MH, Lee YH, Kim HJ, Schenk T, Lee W, Kim KD, Fengler FPG, Mikolajick T, Schroeder U, Hwang CS (2013) Surface and grain boundary energy as the key enabler to ferroelectricity in nanoscale hafnia-zirconia: comparison of model and experiment. Nanoscale 28:1–16

    Google Scholar 

  18. Yurchuk E, Müller J, Müller S, Paul J, Pešić M, van Bentum R, Schroeder U, Mikolajick T (2016) Charge-trapping phenomena in HfO2-based FeFETtype nonvolatile memories. IEEE Trans Electron Devices 63:3501–3507

    CAS  Article  Google Scholar 

  19. Peng Y, Xiao W, Han G, Wu J, Liu H, Liu Y, Xu N, King Liu T-J, Hao Y (2018) Nanocrystal-embedded-insulator ferroelectric negative capacitance FETs with sub-kT/q swing. IEEE Electron Device Lett 40:9–12

    Google Scholar 

  20. Pahwa G, Dutta T, Agarwal A, Khandelwal S, Salahuddin S, Hu C, Chauhan YS (2016) Analysis and compact modeling of negative capacitance transistor with high ON-current and negative output differential resistance—part II: model validation. IEEE Trans Electron Devices 63:4986–4992

    Article  Google Scholar 

  21. Ota H, Ikegami T, Hattori J, Fukuda K, Migita S, Toriumi A (2016) Fully coupled 3-D device simulation of negative capacitance FinFETs for sub 10 nm integration. In: IEDM Tech. Dig., pp 12.4.1–12.4.4

    Google Scholar 

  22. Seo J, Lee J, Shin M (2017) Analysis of drain-induced barrier rising in short-channel negative-capacitance FETs and its applications. IEEE Trans Electron Devices 64:1793–1798

    Article  Google Scholar 

  23. Zhou J, Han G, Li J, Liu Y, Peng Y, Zhang J, Sun Q-Q, Zhang DW, Hao Y (2018) Negative differential resistance in negative capacitance FETs. IEEE Electron Device Lett 39:622–625

    CAS  Article  Google Scholar 

  24. Lin C-I, Khan AI, Salahuddin S, Hu C (2016) Effects of the variation of ferroelectric properties on negative capacitance FET characteristics. IEEE Trans Electron Devices 63:2197–2199

    Article  Google Scholar 

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The authors acknowledge support from the National Natural Science Foundation of China under Grant No. 61534004, 61604112, 61622405 and 61874081, and 61851406. This work was also supported by the 111 Project (B12026).

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YP carried out the experiments and drafted the manuscript. YP and GQH designed the experiments. GQH and YL helped to revise the manuscript. JCZ and YH supported the study. All the authors read and approved the final manuscript.

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Correspondence to Yan Liu or Genquan Han.

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State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, People’s Republic of China.

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Peng, Y., Liu, Y., Han, G. et al. Germanium Negative Capacitance Field Effect Transistors: Impacts of Zr Composition in Hf1−xZrxO2. Nanoscale Res Lett 14, 125 (2019).

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  • Ferroelectric
  • Negative capacitance
  • Hysteresis
  • Subthreshold swing
  • FET