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Table 1 Device specifications

From: On the Baliga’s Figure-Of-Merits (BFOM) Enhancement of a Novel GaN Nano-Pillar Vertical Field Effect Transistor (FET) with 2DEG Channel and Patterned Substrate

Parameter	Value and unit
Device length	L_D = 1 μm
Device depth	W_D = 1 μm
Polarization charge	σ_p= 6.5 × 10¹² cm⁻²
SP interface trap (Al₂O₃)	D_SP = 8 × 10¹² cm⁻²; E_T = E_C-0.5 eV
p-GaN cap length	L_P = 0.4 to 0.7 μm
SP length	L_W = 0 to 800 nm
SP height	H_W = 0 to 4.7 μm
Gate length	L_G = 15 nm
Gate height	L_W = 0.17 μm

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