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Table 1 Device specifications

From: On the Baliga’s Figure-Of-Merits (BFOM) Enhancement of a Novel GaN Nano-Pillar Vertical Field Effect Transistor (FET) with 2DEG Channel and Patterned Substrate

Parameter Value and unit
Device length LD = 1 μm
Device depth WD = 1 μm
Polarization charge σp= 6.5 × 1012 cm−2
SP interface trap (Al2O3) DSP = 8 × 1012 cm−2; ET = EC-0.5 eV
p-GaN cap length LP = 0.4 to 0.7 μm
SP length LW = 0 to 800 nm
SP height HW = 0 to 4.7 μm
Gate length LG = 15 nm
Gate height LW = 0.17 μm