Background

Doped poly-HfO2 ferroelectric field-effect transistors (FeFETs) have attracted considerable interest in the non-volatile memory (NVM) applications due to their CMOS process compatibility [1]. Although the decent electrical performance has been demonstrated in doped HfO2-based FeFETs [2], some fundamental limitations still plague their practical applications, including the high thermal budget of 500 °C annealing required to form orthorhombic crystal phases and the undesired leakage current along the grain boundaries with the scaling down of ferroelectric thickness. Ferroelectricity has been widely observed in a variety of different materials, e.g., Sb2S3 nanowires [3], GaFeO3 film [4], LaAlO3-SrTiO3 film [5], and amorphous Al2O3 containing nanocrystals [6, 7]. Recently, we reported the FeFETs with partially crystallized ZrO2 gate insulator functioning as NVM and analog synapse [8]. Although the ZrO2 transistors exhibited decent electrical performance with the thinner thickness compared to the reported doped HfO2, the underlying mechanism for the ferroelectricity in ZrO2 film remains unclear. It is critical and important to elucidate the origin of the switchable polarization P for evaluating the performance limit of ZrO2 FeFETs.

In this work, TaN/ZrO2/Ge FeFETs with 2.5 nm, 4 nm, and 9 nm-thick insulators are fabricated. The switchable P in TaN/ZrO2/Ge capacitor is proposed to originate from the migration of voltage-driven oxygen vacancies and negative charges. The impacts of ZrO2 thickness and the post-rapid thermal annealing (RTA) on the P of TaN/ZrO2/Ge and the memory window (MW), endurance, and retention characteristics of FeFETs are investigated.

Methods

FeFETs with ZrO2 gate insulator were fabricated on 4-in. n-Ge(001) substrate using a similar process in [8, 9]. After the pre-gate cleaning in the diluted HF (1:50) solution, Ge wafers were loaded into an atomic layer deposition (ALD) chamber. ZrO2 films with thicknesses of 2.5 nm, 4 nm, and 9 nm were deposited at 250 °C using TDMAZr and H2O as precursors of Zr and O, respectively. A 100-nm-thick TaN gate electrode was deposited by reactive sputtering. After the gate electrode formation, the source/drain (S/D) regions were implanted by BF2+ at a dose of 1 × 1015 cm−2 and an energy of 20 keV. A total of 15 nm nickel (Ni) S/D contacts were formed by a lift-off process. Finally, the RTA at 350, 450, and 500 °C for 30 s was carried out.

Figure 1 a shows the schematic of the fabricated transistor. Figure 1b–d shows the transmission electron microscope (TEM) images of the TaN/ZrO2/Ge samples with 2.5, 4, and 9 nm-thick ZrO2, respectively. All the samples underwent an RTA at 500 °C for 30 s. The 2.5 nm ZrO2 sample remains an insulator film after the annealing. For the 4 nm sample, although some nanocrystals are observed, ZrO2 maintains to be an amorphous layer. While full crystallization occurs for the 9 nm ZrO2 film. Notably, an interfacial layer (IL) of GeOx exists between the ZrO2 and Ge channel region, although it is too thin to be observed in the TEM images.

Fig. 1
figure 1

a Schematic of the fabricated TaN/ZrO2/Ge FeFET. b, c, and d HRTEM images of the TaN/ZrO2/Ge stacks with different ZrO2 thicknesses. The samples underwent an RTA at 500 °C for 30 s

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Results and Discussion

Figure 2 shows the P vs. voltage (V) curves for the TaN/ZrO2/Ge capacitors with different ZrO2 thicknesses and different annealing temperatures. The solid lines with different colors represent the minor loops with various sweeping voltage range (Vrange). The measurement frequency is 1 kHz. The 2.5 nm and 4 nm ZrO2 devices can exhibit stable ferroelectricity after an RTA at 350 °C. Figure 3 plots the remnant P (Pr) as a function of the sweeping V range curves for the capacitors annealed at various temperatures.

Fig. 2
figure 2

Measured P vs. V characteristics of the TaN/ZrO2/Ge capacitors with different ZrO2 thicknesses and various annealing temperatures

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Fig. 3
figure 3

Comparison of Pmax as a function of Vrange for the TaN/ZrO2/Ge capacitors with different ZrO2 thicknesses and various annealing temperatures

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Figure 3 shows the comparison of Pmax as a function of Vrange for the TaN/ZrO2/Ge capacitors with the different ZrO2 thicknesses and the various RTA temperatures. For the 4 nm ZrO2 devices, as the annealing temperature increases from 350 to 450 °C, a larger Vrange is required to obtain a fixed Pmax. This is attributed to the fact that the higher annealing temperature produces the thicker interfacial layers (ILs) between at Ge/ZrO2 and ZrO2/TaN interfaces, leading to a larger unified capacitance equivalent thickness (CET). For the 2.5 nm ZrO2 capacitors, the sample with 500 °C annealing has a lower Vrange than does the 350 °C annealing sample with the same Pmax. Although the ILs get thicker with the increased RTA temperature, some ZrO2 was consumed by the oxygen scavenging and interdiffusion at the interface. For the very thin ZrO2 device, the latter is dominant. Compared to the 2.5 nm ZrO2 capacitor, a much larger Vrange is required to achieve a similar Pmax. However, the 9 nm ZrO2 capacitor does not exhibit the higher Vrange in comparison with the 4 nm device. This is due to the crystal ZrO2 that has a much higher κ value than does the amorphous film, which significantly reduces the CET of the 9 nm device.

Figure 4a shows the extracted evolution of the positive and negative Pr, denoted by \( {P}_{\mathrm{r}}^{+} \)and \( {P}_{\mathrm{r}}^{-} \), respectively, for the 4 nm-thick ZrO2 capacitors with RTA at different temperatures over 106 sweeping cycles measured at 1 kHz. Devices annealed at 350 °C and 450 °C exhibit the obvious wake-up effect. No wake up or imprint is observed for the 4 nm ZrO2 ferroelectric capacitor underwent annealing at 500 °C. Figure 4b compares the Pr as a function of sweeping cycles for the devices with the different ZrO2 thicknesses. The 4 nm ZrO2 ferroelectric capacitor achieves improved stability of Pr endurance compared to the 2.5 nm and 9 nm devices during the 106 endurance test.

Fig. 4
figure 4

aPr vs. the number of ms-pulse sweeping cycles for 4 nm ZrO2 capacitors with different RTA temperatures. bPr vs. number of ms-pulse sweeping cycles for the ZrO2 capacitors after annealing at 500 °C

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The switching P is observed in amorphous ZrO2 capacitance, and it is inferred that the mechanism must be different from that of the reported doped poly-HfO2 ferroelectric films. We propose that the underlying mechanism for ferroelectric behavior is related to the oxygen vacancy dipoles. It is well known that, as TaN metal deposited, the Ta oxygen scavenger layers will increase the oxygen vacancy concentration inside ZrO2 [10]. Oxygen vacancies also appear at the ZrO2/Ge interface. Figure 5 shows the schematics of the switchable P in TaN/ZrO2/Ge originating from the migration of oxygen vacancies and negative charges to form the positive and negative dipoles. It is speculated that the negative charges in ZrO2 are related to the Zr vacancy [11], which is similar to those in Al2O3 film [12]. The migration of the voltage-driven oxygen vacancies has been widely demonstrated in resistive random-access memory devices [13, 14]. Notably, this is the first demonstration of three-terminal non-volatile transistors dominated by the voltage-driven oxygen vacancies.

Fig. 5
figure 5

Schematics of the mechanism for switchable P in ZrO2 capacitors, which is attributed to the migration of voltage-driven oxygen vacancies and negative charges to form dipoles

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The P-V hysteresis enables the ZrO2 FeFETs to obtain a large and stable MW for the embedded NVM (eNVM) applications. Figure 6 shows the measured IDS-VGS curves of 2.5, 4, and 9 nm ZrO2 FeFETs for the two polarization states with 1 μs program/erase (P/E) conditions. The transistors were annealed at 500 °C. Program (erase) operation is achieved by applying positive (negative) voltage pulses to the gate of the ZrO2 FeFETs, to raise (lower) its threshold voltage (VTH). VTH is defined as VGS at 100 nA·W/L, and MW is defined as the maximum change in VTH. All the FeFETs with various ZrO2 thicknesses have the MW above 1 V with 1 μs P/E pulses. To achieve a similar MW, a higher erase voltage is needed for the 9 nm ZrO2 FeFET compared to the other two transistors. It is seen that a larger magnitude erase VGS is required to obtain the roughly equal shift of I-V relative to the initial curve compared to the program VGS. It is speculated that the oxygen vacancies contributing to the P mainly come from the reaction between TaN and ZrO2, like the initial state of the device in Fig. 5a. As a positive VGS (program) is applied, the oxygen vacancies diffuse and accumulate in the layer near the ZrO2/Ge interface (Fig. 5b), where the distribution of the oxygen vacancy dipoles is quite different from the initial state. So it is easy to shift the I-V curve to a higher |VTH| with a positive VGS. However, as a negative VGS (erase) is applied, the back diffusion of oxygen vacancies brings the gate stack back to its original state (Fig. 5c). So the magnitude of the negative erase VGS has to be increased to achieve the equivalent shift of I-V to the positive program VGS.

Fig. 6
figure 6

Measured IDS-VGS curves of the 2.5, 4, and 9 nm-thick ZrO2 FeFETs for the initial and two polarization states with 1 μs P/E pulses

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As the P/E pulse width is reduced to 100 ns, the ZrO2 FeFETs still demonstrate the decent MW, as shown in Fig. 7a. Especially, the transistor with 2.5 nm ZrO2 annealed at 350 °C achieves an MW of 0.28 V. Figure 7b plots MW vs. cycle number for the FeFETs with various ZrO2 thicknesses with 100 ns P/E pulse condition. The 4 nm ZrO2 device achieves a significantly improved endurance performance compared to the 2.5 nm and 9 nm ZrO2 FeFETs, which exhibit the obvious wake-up effect and fatigue within 103 cycles.

Fig. 7
figure 7

aIDS-VGS curves of the 2.5, 4, and 9 nm-thick ZrO2 FeFETs for the two polarization states with 100 ns P/E pulses. The devices underwent an RTA at 500 °C. b FeFET with 4 nm ZrO2 has an improved endurance compared to the 2.5 and 9 nm ZrO2 transistors

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Finally, the retention testing of the ZrO2 FeFETs is characterized and shown in Figs. 8 and 9. Figure 8 a shows the evolution of IDS-VGS curves for the two polarization states of the 4 nm ZrO2 FeFETs underwent RTA at 350, 450, and 500 °C. The charge trapping leads to the reduction of the devices with the time. As shown in Fig. 8b, the retention performance of the devices can be improved with the increase of the RTA temperature. An MW of ~ 0.46 V is extrapolated to be maintained over 10 years. Figure 9 compares the retention characteristics of the FeFETs with different ZrO2 thicknesses. The 4 nm ZrO2 device has an improved retention performance compared to the transistors with 2.5 and 9 nm-thick ZrO2.

Fig. 8
figure 8

a The evolution of IDS-VGS curves for the two polarization states of the 4 nm ZrO2 FeFETs with different RTA temperatures. b The 4 nm ZrO2 device annealed at 500 °C has a much better retention performance compared to the transistors with RTA at the lower temperatures

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Fig. 9
figure 9

a The evolution of IDS-VGS curves for the two polarization states for the 2.5, 4, and 9 nm-thick ZrO2 FeFETs underwent a RTA at 500 °C. b The 4 nm ZrO2 device has an improved retention performance compared to the transistors with 2.5 and 9 nm-thick ZrO2

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Conclusions

In summary, amorphous ZrO2 ferroelectric capacitors are experimentally demonstrated, and the ferroelectricity is speculated to be due to the migration of the voltage-driven dipoles formed by the oxygen vacancies and negative charges. FeFETs with 2.5 nm, 4 nm, and 9 nm ZrO2 have the MW above 1 V with 1 μs P/E pulses. The improved fatigue and retention characteristics are obtained in the 4 nm-thick ZrO2 FeFET in comparison with the devices with 2.5 nm and 9 nm ZrO2. The retention test indicates that the 4 nm ZrO2 transistor keeps an extrapolated 10-year MW of ~ 0.46 V.