Fig. 2From: Low Voltage Operating 2D MoS2 Ferroelectric Memory Transistor with Hf1-xZrxO2 Gate Structurea P-V hysteresis loops for the HZO (6 nm)/Al2O3 (2 nm) capacitor with different voltage sweeping ranges. Dependence of (b) Pr and cVc on cycling for the HZO (6 nm)/Al2O3 (2 nm) capacitor with ± 4 V/1 kHz cyclingBack to article page