Fig. 2From: Growth and Selective Etch of Phosphorus-Doped Silicon/Silicon–Germanium Multilayers Structures for Vertical Transistors Applicationa The schematic of experimental samples with different undoped spacer layers. And Ge, Si, and P profiles of P-doped Si/Si0.86Ge0.14/P-doped Si MLs with undoped Si spacer layers of b 3 nm, in both interfaces, c 5 nm, in both interfaces, d 10 nm, only at one interface with Si0.86Ge0.14Back to article page