Fig. 9From: Growth and Selective Etch of Phosphorus-Doped Silicon/Silicon–Germanium Multilayers Structures for Vertical Transistors ApplicationHRRLMs of P-doped Si/Si0.86Ge0.14/P-doped Si MLs with 5 nm spacer layer (sample-1) in a–d, and P-doped Si0.93Ge0.07/Si0.78Ge0.22/P-doped Si0.93Ge0.07 MLs (Sample-2) in e–h. The two mappings both have four panels: as grown, after vertical etch, lateral wet etch of HF (6%)/H2O2 (30%)/CH3COOH (99.8%) 20 min, and lateral dry etch of CF4/O2/He 11.5 sBack to article page