Fabrication and electrical properties of MoS2 nanodisc-based back-gated field effect transistors

Two-dimensional (2D) molybdenum disulfide (MoS2) is an attractive alternative semiconductor material for next-generation low-power nanoelectronic applications, due to its special structure and large bandgap. Here, we report the fabrication of large-area MoS2 nanodiscs and their incorporation into back-gated field effect transistors (FETs) whose electrical properties we characterize. The MoS2 nanodiscs, fabricated via chemical vapor deposition (CVD), are homogeneous and continuous, and their thickness of around 5 nm is equal to a few layers of MoS2. In addition, we find that the MoS2 nanodisc-based back-gated field effect transistors with nickel electrodes achieve very high performance. The transistors exhibit an on/off current ratio of up to 1.9 × 105, and a maximum transconductance of up to 27 μS (5.4 μS/μm). Moreover, their mobility is as high as 368 cm2/Vs. Furthermore, the transistors have good output characteristics and can be easily modulated by the back gate. The electrical properties of the MoS2 nanodisc transistors are better than or comparable to those values extracted from single and multilayer MoS2 FETs.

MoS 2 sheets are most commonly fabricated by micromechanical exfoliation (Scotch-tape peeling) [18,19]. Lithiumbased intercalation [20,21], liquid-phase exfoliation [22], and other methods [23][24][25] have also been used to synthesize single-layer and few-layer MoS 2 . However, the yield and reproducibility of micromechanical exfoliation are poor, and the complexity of the other methods presents disadvantages to their use. Chemical vapor deposition (CVD) is a simple and scalable method for the synthesis of transition metal dichalcogenide thin films having large area. Liu et al. and Zhan et al. have successfully synthesized large-area MoS 2 films via CVD [26,27].
Much research has been done on single and multilayer MoS 2 FETs where the MoS 2 layer is fabricated by micromechanical exfoliation then transferred to Si substrates. However, few studies have addressed the electrical properties of back-gated MoS 2 field effect transistors with Ni as contact electrodes. This study is the first to report backgated FETs based on MoS 2 nanodiscs synthesized directly using CVD. The MoS 2 nanodiscs fabricated via CVD are large and uniform. We herein report upon their surface morphologies, structures, carrier concentration, and mobility, as well as the output characteristics and transfer characteristics of FETs based on these obtained MoS 2 nanodiscs, with Ni as contact electrodes.

Methods
MoS 2 nanodiscs were deposited via CVD on n-type silicon (111) substrates covered with a 280-nm SiO 2 layer. Figure 1a illustrates the CVD experimental setup, which is composed of five parts: a temperature control heating device, a vacuum system, an intake system, a gas meter, and a water bath. The Si substrates were placed in the center of a horizontal quartz tube furnace, after being ultrasonically cleaned with a sequence of ethanol and deionized water and dried with N 2 . A MoS 2 solution was formed by adding 1-g analytical grade MoS 2 micro powder to 200 mL of diluted sulfuric acid with stirring for 5 min at room temperature. The solution was then moved in a beaker flask that was placed in a water bath with a constant temperature of 70°C to improve the solubility of the powder. Before deposition, the furnace was evacuated to 10 −2 Pa and heated to 300°C for 10 min to remove moisture. To deposit the MoS 2 film, Ar gas with a volume ratio of 10 to 30 sccm was flowed into the MoS 2 solution, carrying MoS 2 molecules into the furnace's reactive chamber, which was kept at a constant temperature of 550°C and a working pressure of 50 Pa for 10 min to obtain uniform growth. The nanodiscs were formed by the adsorption and deposition of MoS 2 molecules onto the SiO 2 /Si substrates. To improve the quality of the discs, and their ability to form electrical contacts, the samples were further annealed at 850°C for 30 min in Ar. Finally, the furnace was slowly cooled back down to room temperature and the samples were removed. Some of the MoS 2 discs were set aside as representative samples for characterization of surface morphologies and structures, and the others were used to fabricate MoS 2 back-gated FETs. Figure 1b is a schematic of a MoS 2 back-gated FET. The source and drain electrodes were formed by lithographic patterning, and Ni electrodes were sputtered onto them using magnetron sputtering technology. The MoS 2 nanodiscs serve as the channel, whose length and width are 1.5 and 5 μm, respectively. The back gate of the FET was completed by sputtering a 50-nm-thick Ni layer on the back of the Si substrate.
The surface morphology and crystalline structure of the MoS 2 discs were analyzed by atomic force microscopy (AFM) and X-ray diffraction (XRD), respectively. The electrical properties of the samples were measured using a Hall Effect Measurement System (HMS-3000, Ecopia, Anyang, South Korea) at room temperature. The electrical properties of the MoS 2 nanodisc-based FETs, configured as shown in Figure 1b, were measured using a Keithley 4200 semiconductor characterization system (Cleveland, OH, USA).  Figure 2b shows a three-dimensional image of the MoS 2 nanodisc film, which further confirms the high quality of the MoS 2 nanodisc film. Figure 3a shows XRD patterns of the obtained MoS 2 nanodiscs. Because the intensities of the diffraction peaks differed too widely to be presented in a single plot, the larger plot shows the diffraction peaks in the range of 10°to 60°, while the small insert shows the diffraction peaks that appear between 60°and 70°. Over the whole range of diffraction angles, the MoS 2 nanodiscs exhibit eight diffraction peaks, located at 14.7°, 29.5°, 33. of crystal structures. Moreover, the obtained diffraction peaks are rather sharp, which shows that the MoS 2 nanodiscs are crystalline over a large area. The peak corresponding to the (108) crystal face is much more intense than the other peaks, indicating that the discs have a strong tendency to adopt the (108) crystal orientation during their growth. The surface current-voltage (I-V) properties, surface carrier concentration and mobility of the obtained MoS 2 nanodiscs are very sensitive to the quality of the film. Figure 3b shows the surface I-V properties of the MoS 2 nanodisc film. The inset shows the layout of the four measurement points on the MoS 2 nanodisc film. The I-V curves measured between any two points show a perfect linear dependence, which indicates that the deposited MoS 2 nanodiscs have good conductivity. The measured carrier concentration of the MoS 2 discs is about 3.412 × 10 6 cm −2 , and their electron mobility is as high as 6.42 × 10 2 cm 2 /Vs. This mobility value is higher than previously reported values (2 to 3 × 10 2 cm 2 /Vs) for single and multilayer MoS 2 [19,28]. This significant increase of room-temperature mobility value in our MoS 2 may result from the MoS 2 nanodisc structure. The mobility of SL MoS 2 is generally smaller than bulk MoS 2 because of the larger phonon scattering [29]. However, FL MoS 2 exhibits fewer dangling bonds and defect states than does SL MoS 2 , significantly decreasing the phonon scattering. The lattice scattering in the two-dimensional (2D) nanodiscs should be even lower, due to their surface roughness and boundaries. The above findings clearly demonstrate that the MoS 2 nanodiscs fabricated via CVD have uniform morphologies, structures, and electrical properties.

Results and discussion
The electrical properties of the MoS 2 nanodisc-based back-gated FETs, with Ni as the source, drain, and back gate contacts were next investigated at room temperature. Figure 4a shows the relationship between the gate current (I GS ) and the gate voltage (V GS ) of the transistor at a drain voltage (V DS ) of 5 V. The current through the device increases exponentially with the applied positive voltage, and tends to be almost zero under the revised voltage, showing that the MoS 2 transistor is a good rectifier. Figure 4b displays the output characteristics (drain current I DS versus drain voltage V DS ) of back-gated MoS 2 transistors at room temperature for V GS = 0, 5, 10, 15, and 20 V. For small V GS , the current I DS shows an exponential dependence on V DS at low V DS values, which results from the presence of a sizable Schottky barrier at the Ni-MoS 2 interface [12]. Then, for larger  values of V GS , the relation between I DS and V DS becomes linear as V DS increases, which is consistent with the previously reported findings [12]. The barrier height at larger V GS is lower that has been previously demonstrated in greater detail [12,30,31]. Thus, the channel can give rise to thermally assisted tunneling, which is responsible for the linear relationship between I DS and V DS . Finally, when V DS increases above a certain value, the current I DS becomes saturated, achieving the output properties of a traditional FET. Figure 5a shows the transfer characteristics (I DS /V GS ) of the back-gated MoS 2 transistor at room temperature for V DS = 1 V. It is clear that the gate leakage of the FET is negligible and the on/off current ratio can be up to 1.9 × 10 5 , larger than that in the WSe 2 -based FETs at low temperature [32], which demonstrates that the MoS 2 transistor can be easily modulated by the back gate. Moreover, the Fermi level of Ni is close to the conduction band edge of MoS 2 , consistent with earlier reports [7,12], which makes MoS 2 transistors exhibit mostly n-type behavior. Figure 5b shows the variation of the device transconductance g m (g m = dI DS /dV GS ) with V GS at V DS = 1 V. The extracted maximum g m is about 27μS (5.4 μS/μm) within the entire range of V GS , better than previously reported values [7,12]. The field effect mobility μ also can be obtained based on the conventional dependence of μ = g m [L/(W · C OX · V DS )] at V DS = 1 V, where g m is the maximum value of g m , and L and W are the length and width of the channel, and C OX = 1.1 × 10 −4 F/m 2 is the gate capacitance per unit area [33]. C OX is equal to ε OX /d OX , where ε OX is the dielectric constant and d OX is the thickness of the gate dielectric. Using this relationship, the field effect mobility μ is as high as 368 cm 2 /Vs, comparable to that of single and multilayer MoS 2 FETs [7,10,12,26,34]. Note that the field effect mobility is lower than the electron mobility of the MoS 2 nanodiscs, which is likely due to the presence of scattering and defect states.

Conclusions
Using CVD, we have fabricated uniform MoS 2 nanodiscs, organized into thin films with large area and having good electrical properties. The nanodiscs were incorporated  into high-performance back-gated field effect transistors with Ni as contact electrodes. The transistors have good output characteristics and exhibit typical n-type behavior, with a maximum transconductance of approximately 27 μS (5.4 μS/μm), an on/off current ratio of up to 1.9 × 10 5 and a mobility as high as 368 cm 2 /Vs, comparable to that of FETs based on single and multilayer MoS 2 . These promising values along with the very good electrical characteristics, MoS 2 transistors will be the attractive candidates for future low-power applications.