Effects of Annealing Ambient on the Characteristics of LaAlO3 Films Grown by Atomic Layer Deposition

We investigated the effects of different annealing ambients on the physical and electrical properties of LaAlO3 films grown by atomic layer deposition. Post-grown rapid thermal annealing (RTA) was carried out at 600 °C for 1 min in vacuum, N2, and O2, respectively. It was found that the chemical bonding states at the interfacial layers (ILs) between LaAlO3 films and Si substrate were affected by the different annealing ambients. The formation of IL was enhanced during the RTA process, resulting in the decrease of accumulation capacitance, especially in O2 ambient. Furthermore, based on the capacitance-voltage characteristics of LaAlO3/Si MIS capacitors, positive V FB shifting tendency could be observed, indicating the decrease of positive oxide charges. Meanwhile, both trapped charge density and interface trap density showed decreased trends after annealing treatments. In addition, RTA process in various gaseous ambients can reduce the gate leakage current due to the enhancement of valence band offset and the reduction of defects in the LaAlO3/Si structure in varying degrees.


Background
According to Moore's law, gate dielectrics applied in complementary metal oxide semiconductor (CMOS) devices with an equivalent oxide thickness (EOT) of no more than 1 nm are needed since the 45-nm technology node. Consequently, insulating materials with much higher dielectric constant than that of silicon oxide or oxynitrides are required to gain an acceptable gate leakage current and static power consumption [1]. Due to its appreciably high dielectric constant (20~25), large band gap (E g > 5 eV), and valence band offset (VBO > 1 eV) relative to silicon, lanthanum aluminate (LaAlO 3 ) has been considered as one of the alternative materials to replace SiO 2 as the insulator [2,3]. Benefit from its growth mechanism controlled by a self-limited surface reaction, atomic layer deposition (ALD) is being considered as a promising deposition technique to produce high quality high-k thin films with excellent conformality and precise thickness controllability [4]. However, ALD is a lowtemperature deposition technique, thus high temperature post-deposition annealing (PDA) is needed to eliminate trapped charges and dangling bonds in high-k dielectric films after the deposition process [5,6]. In addition, the annealing treatment can also be of help to reduce interface trap density (D it ) at the insulator/semiconductor interfaces [7]. Unfortunately, PDA process can significantly increase the thickness of interfacial layer (IL) between high-k dielectric and Si substrate by the interdiffusion of the dielectric and silicon, resulting in the decrease of dielectric constant for insulators [8]. Besides, it has been reported that different annealing treatments affect high-k films and interfaces both structurally and electrically in varying degrees [9]. The interfacial properties, including the amount of oxide-trapped charges, fixed oxide charges, interface traps, oxygen vacancies, and dangling bonds, play an important role in determining the electrical characteristics of dielectric film [10].
In this paper, the effects of different annealing ambients on the physical and electrical characteristics of LaAlO 3 films grown on p-type Si substrate by ALD technique were investigated. Post-grown rapid thermal annealing was carried out at 600°C for 1 min in vacuum, N 2 , and O 2 , respectively. Among, attentions were focused on the interfacial properties of LaAlO 3 /Si structures to analyze the effects of different annealing ambients.

Methods
LaAlO 3 dielectric films were deposited on p-type Si (100) wafers by the Picosun R-150 atomic layer deposition reactor. Prior to the deposition, the wafers were treated with a 1:50 diluted HF solution to remove the native SiO 2 , followed by a 60-s rinse in demonized water. Under the deposition temperature of 300°C, La( i− PrCp) 3 and TMA were used as the La and Al precursors, while O 3 was used as the oxygen source. Setting the pulse ratio of La and Al precursor as 3:1, the La:Al stoichiometric ratio of the deposited films is approximately 1:1 [11]. By varying the number of ALD cycles, LaAlO 3 films with the thickness of 4 and~10 nm were prepared. After the deposition of LaAlO 3 films, post-grown rapid thermal annealing (RTA) was carried out immediately at 600°C for 1 min in vacuum, N 2 , and O 2 ambients, respectively. The film thickness was measured by Woollam M2000D spectroscopic ellipsometry (SE). The microstructures of the gate insulators (LaAlO 3 dielectric) were observed by crosssectional high resolution transmission electron microscopy (HRTEM) performed with the [100] direction [12] of the Si substrate. The chemical composition of the fabricated films was examined by time of flight secondary ion mass spectrometry (TOF-SIMS). The band structures of the films were examined by the X-ray photoelectron spectroscopy (XPS) measurements. All the wafers were etched by Ar + for 10 s (0.26 nm/s) to remove the impurities on the film surface. In this experiment, the 10-nm LaAlO 3 film was used to obtain the XPS spectra for thick amorphous LaAlO 3 , and the 4-nm LaAlO 3 /Si structure was thin enough to obtain XPS spectra from both the LaAlO 3 film and the underlying silicon substrate. The electrical properties of the 4-nm LaAlO 3 films were measured using a metal-insulator semiconductor (MIS) capacitor structure. The MIS capacitors were fabricated by magnetron sputtering 150 nm Pt on the surface of the wafers through a shadow mask (metal gate with a diameter of 300 μm). The electrical properties, including capacitance-voltage (C-V), conductance-voltage (G-V), and leakage current densityvoltage (J-V) characteristics, were measured using an Agilent B1500A analyzer.
For simplicity, the as-grown and annealed films in vacuum, N 2 , and O 2 ambients were assigned as S1, S2, S3, and S4, respectively.

Results and Discussion
As shown in Fig. 1, O 1s XPS spectrums for the~4-nm as-grown and annealed LaAlO 3 films in vacuum, N 2 , and O 2 ambients were analyzed to investigate the chemical bonding states near the interface between the  [13,14]. Among the five peaks, peak I and peak III come from chemical products La 2 O 3 and Al 2 O 3 in the deposition process. The high temperature annealing process promotes the fracture and recombination of chemical bonds, as a result, the amount of Al-O-Al decreases while the amount of La-O-Al increases. After the annealing treatments, slight variation for the La-O-La signal was observed since few La-O-La bonds were formed in the deposition process due to the high formation enthalpy of La 2 O 3 [15]. Peak IV, related to La(OH) x , may come from the hygroscopicity of the La 2 O 3 [16]. After high temperature annealing treatments, significant decrease in the intensity of peak IV could be observed, indicating the reduction of hydroxyl groups [17]. It is found that the intensity of Peak V shows a more obvious increase when the annealing treatment was carried out in O 2 ambient compared with that in N 2 or vacuum ambient, indicating that more Si-O-Si bonds were formed during the RTA process in O 2 ambient. The Si-O-Si bonds are considered to come from SiO x , which is a main component of IL between the LaAlO 3 film and silicon substrate [18]. So, it can be concluded that the formation of IL was enhanced during the RTA process, especially in O 2 ambient.
To further investigate the structural information at the dielectric/Si interface, cross-sectional HRTEM analyses for S1 and S4 are shown in Fig. 2. Both S1 and S4 exhibit an amorphous structure as no nanometer-sized crystal or long-range ordered crystal region was observed [19]. Compared with Fig. 2a, a much thicker amorphous transition region about~2.7 nm between the deposited film and Si substrate is observed in Fig. 2b, indicating a much thicker IL formation during the annealing process in O 2 ambient. We attribute this difference of IL formation to the RTA-induced interdiffusion of LaAlO 3 films and silicon substrates. In order to address the evolution of the chemical composition at the LaAlO 3 /Si interface and within the LaAlO 3 films, TOF-SIMS depth profiles of Si + , La + , SiO 3 − , and OH − clusters were acquired on S1 and S4, as shown in Fig. 3. The intensity of the signals was dealt with normalization method, and depth values were calibrated by HRTEM results. As shown in the depth profiles of Si + and La + , during the annealing process, substrate Si atoms diffuse into the upper LaAlO 3 film, and the diffusion of La atoms in the opposite direction occurs simultaneously. HRTEM analysis reveals the existence of a thicker IL in S4, and now this result can be further confirmed from the intensity of SiO 3 − signals which suggest the extra presence of a SiO x -like component coexisting with the La-based profile (La + ) in the region at the nanolaminate/ substrate interface for S4. Besides, compared with S1, the OH − profile is reduced after annealing treatment in O 2 ambient, in good agreement with the XPS results. Figure 4 shows the C-V and G-V characteristics of the fabricated MIS capacitors using the as-grown and annealed LaAlO 3 films as insulators. C-V characteristics were obtained by sweeping forward (bias from negative to positive) and backward (bias from positive to negative) at the frequency of 100 kHz. G-V curves were obtained simultaneously with the C-V curves measured with applied voltage sweeping from positive to negative. The accumulation capacitance values of the MIS capacitors using the fabricated LaAlO 3 films S1~S4 as insulators were obtained to be 1.28, 1.20, 1.10, and 0.93 μF/ cm 2 , respectively. The annealing treatment of LaAlO 3 films in different ambients results in varying degrees of decrease in accumulation capacitance. In accordance with the XPS results shown in Fig. 1 and TOF-SIMS results shown in Fig. 3, such decreases in the accumulation capacitance are attributed to the formation of lower dielectric constant ILs, which primarily consist of SiO xlike component and La-silicate, due to the interdiffusion of LaAlO 3 films and silicon substrates during the RTA treatment [20].
The flat band voltages (V FB ) of the capacitors were extracted from the simulation software named Hauser NCSU CVC program taking into account of quantummechanical effects [21]. Considering the work function difference between the p-type Si substrate and Pt electrode, the ideal V FB should be 0.73 V. However, the actual V FB swept backward for the as-grown LaAlO 3 film is 0.01 V, indicating the existence of effective positive oxide charges in the LaAlO 3 film, which may be attributed to the existence of positive fixed oxide charges and oxide-trapped charges. Compared with the as-grown LaAlO 3 film, positive V FB shifts for the LaAlO 3 films annealed at 600°C in vacuum, N 2 , and O 2 ambients were observed to be 0.06, 0.33, and 0.51 V, respectively, revealing the reduction of positive oxide charges during the RTA treatments [22]. Assuming the two-dimensional distribution of traps in the vicinity of the interface contributing to the film capacitance, we investigated the charge trapping behavior through the C-V hysteresis characteristics. The trapped charge density (N ot ) can be estimated following the equations [23,24]: Where C ox is the gate oxide capacitance, C ac is the measured accumulation capacitance, G ac is the conductance in accumulation region, q is the electron charge (1.602 × 10 19 C), A is the electrode area, and ω is the angular frequency. The hysteresis width (ΔV FB ) of S1~S4 were extracted to be 299, 135, 122, and 72 mV, separately. Thus, using Eqs. (1) and (2), the N ot values of S1~S4 were determined to be 2.47 × 10 12 , 1.03 × 10 12 , 8.47 × 10 11 , and 4.20 × 10 11 cm −2 , respectively. As expected, a visible decrease in N ot could be observed after annealing treatments, indicating that the reduction of the oxide trapped charges, which may be attributed to the existence of oxygen vacancies, should be one of the causes leading to the positive shifts of V FB . In addition, the larger decrease in the magnitude of N ot for the LaAlO 3 film annealed in O 2 ambient may be owing to the further reduction of oxygen vacancies during the oxygen atmosphere annealing process [25].
Moreover, as shown in Fig. 4, varying degrees of humps in the C-V curves could be observed, which may be caused by the existence of interfacial traps [26,27]. Compared with Fig. 4a, it can be seen that the humps were reduced after the annealing treatments, especially in O 2 ambient. Considering this, the values of D it for the fabricated MIS capacitors extracted from the Hill-Coleman single-frequency approximation were discussed, and the results are shown in Table 1. The D it values for the fabricated MIS capacitors using S1~S4 as insulator are about 9.65 × 10 12 , 5.12 × 10 12 , 4.29 × 10 12 , and 2.50 × 10 12 eV −1 cm −2 , respectively. After the annealing treatments in different ambients, varying degrees of  Fig. 4 C-V and G-V characteristics for the fabricated MIS capacitors using 4-nm S1~S4 as insulators. a S1. b S2. c S3. d S4. The capacitors were measured at the frequency of 100 kHz decrease in the values of D it are observed, agreeing with the variation trend of the humps in the C-V curves. This phenomenon can be attributed to the decrease of defects and dangling bonds near the interface during the RTA process [28,29].
To further investigate the interfacial properties between the LaAlO 3 films and Si substrate, the VBOs of LaAlO 3 /Si structures were analyzed by XPS measurements. The VBOs of LaAlO 3 films relative to Si substrate were determined by a core level photoemission-based method similar to that of Kraut et al [30,31] as illustrated in Fig. 5a. Accordingly, the VBO is given by Eq. (3): Where E Si 2p is the binding energy of Si 2p shallow core level and E Al 2p is the binding energy of Al 2p shallow core level. Valence band maximum (E v ) is the binding energy corresponding to the top of the valence band (VB) for Si and LaAlO 3 , respectively. The positions of the E v for both Si and dielectrics were determined by linearly extrapolating the segment of maximum negative slope to the background level [32]. Figure 5b, c shows the shallow core-level and VB spectra for bulk clean p-type Si(100) and thick 10-nm LaAlO 3 films, while Fig. 5d shows the shallow core-level spectrums for 4-nm LaAlO 3 /Si structures. The energy difference for bulk p-type Si (100) between the XPS spectra of Si 2p and E v was determined to be 98.9 ± 0.05 eV. Therefore, according to Eq. (3), the VBOs of asgrown and annealed LaAlO 3 films in vacuum, N 2 , and O 2 ambients relative to p-type Si substrate were measured to be 3.24 ± 0.1, 3.36 ± 0.1, 3.46 ± 0.1, and 3.55 ± 0.1 eV, respectively. It is found that the VBO values of the LaAlO 3 films after annealing are obviously larger than that of the as-grown LaAlO 3 film, and the largest Table 1 Various parameters for the fabricated MIS capacitors using S1~S4 as insulators  VBO value was obtained in the O 2 case. The augment of the VBO values after annealing treatments is believed to benefit from the formation of SiO x -like IL, which has much larger band offsets relative to silicon than that of LaAlO 3 . Figure 6 displays the leakage current density as a function of the applied electrical field of the films with the Pt/4-nm LaAlO 3 /p-type Si capacitor structures. The leakage current density for the as-grown LaAlO 3 film was determined to be~7.14 × 10 −4 A/cm 2 at the applied electrical field of −5 MV/cm. After being annealed, at the same applied electrical field, the leakage current density values of the fabricated MIS capacitors using LaAlO 3 films annealed in vacuum, N 2 , and O 2 ambients as insulators were measured to be~1.86 × 10 −4 ,~8.78 × 10 −5 ,~3.18 × 10 −5 A/cm 2 , respectively. Significant decrease in the gate leakage current was observed after being annealed, especially for the O 2 case, in which a decrease of more than one order of magnitude was obtained. Such a decrease of leakage current density may be primarily attributed to the change of valence band offsets at the nanolaminate/Si interface during the high temperature annealing process. It has been reported that the gate leakage current for high-k dielectric depends exponentially on potential barriers, which vary with band offsets [33]. As mentioned above, among the as-grown and annealed samples in vacuum, N 2 , and O 2 ambients, the largest VBO value was obtained in O 2 -annealed LaAlO 3 /Si structure, providing an effective potential barrier to weaken the tunneling effect of electrons and holes in the MIS capacitor, resulting in lowest gate leakage current. In addition, the annealing treatment in O 2 ambient seems to serve as a most effective way to reduce oxygen vacancies, which may also give an explanation to the significant decrease of gate leakage current in S4.

Conclusions
In this paper, the effects of different annealing ambients on the physical and electrical properties of LaAlO 3 films grown by ALD were analyzed. It was found that the amount of hydroxyl groups decreased after annealing treatments. In addition, ILs are formed after annealing treatments, resulting in the decrease of accumulation capacitance values for LaAlO 3 films, especially in O 2 ambient. Compared with the ideal V FB , the actual V FB value for the as-grown LaAlO 3 dielectric was negatively shifted, indicating the existence of positive oxide charges. After RTA treatments in different ambients, oxygen vacancies and defects were reduced, resulting in positive V FB shifts in varying degrees. Significant decrease in the leakage current density was found when the LaAlO 3 films were annealing treated, especially for the LaAlO 3 film annealed in O 2 ambient, in which a decrease of more than one order of magnitude was found. Such a decrease in the leakage current density may be primarily attributed to the larger values of valence band offsets and the reduction of oxygen vacancies near the LaAlO 3 /Si interface. Authors' Contributions LZ generated the research idea, analyzed the data, and wrote the paper. LZ, XW, and CxF carried out the experiments and the measurements. XyF and YtW participated in the discussions. HxL has given the final approval of the version to be published. All authors read and approved the final manuscript.

Competing Interests
The authors declare that they have no competing interests.
Authors' Information LZ, XW, and CxF are PhD students in the Xidian University. HxL is a professor in the Xidian University. XyF and YtW are Master students in the Xidian University. Fig. 6 J-V characteristic of the fabricated MIS capacitors using 4-nm S1~S4 as insulators