Ge pMOSFETs with GeOx Passivation Formed by Ozone and Plasma Post Oxidation

A comparison study on electrical performance of Ge pMOSFETs with a GeOx passivation layer formed by ozone post oxidation (OPO) and plasma post oxidation (PPO) is performed. PPO and OPO were carried out on an Al2O3/n-Ge (001) substrate followed by a 5-nm HfO2 gate dielectric in situ deposited in an ALD chamber. The quality of the dielectric/Ge interface layer was characterized by X-ray photoelectron spectroscopy and transmission electron microscopy. The PPO treatment leads to a positive threshold voltage (VTH) shift and a lower ION/IOFF ratio, implying a poor interface quality. Ge pMOSFETs with OPO exhibit a higher ION/IOFF ratio (up to four orders of magnitude), improved subthreshold swing, and enhanced carrier mobility characteristics as compared with PPO devices. A thicker Al2O3 block layer in the OPO process leads to a higher mobility in Ge transistors. By comparing two different oxidation methods, the results show that the OPO is an effective way to increase the interface layer quality which is contributing to the improved effective mobility of Ge pMOSFETs.


Background
With conventional complementary metal-oxide-semiconductor (CMOS) devices approaching its physical limit, performance enhancement is hard to realize for highspeed semiconductor devices with silicon (Si) as the channel material. Replacing substrate or channel material with other material with high mobility is an imperative option. Germanium (Ge) has been considered as a promising alternative channel material owing to higher carrier mobility than that of Si. The MOSFET usually needs a high-quality oxide/semiconductor interface to reach high effective mobility. However, for quite a long history, Ge MOSFETs suffered from the high interface state density (D it ) caused by the poor thermal stability of GeO 2 and dangling bonds [1]. Thus, plenty of research has been carried out on Ge interface passivation.
Several approaches to achieving a high-quality Ge/dielectric interface layer have been reported, such as Si passivation by uniformly depositing several Si monolayers on Ge substrate before dielectric epitaxy or selfpassivation by forming GeO 2 on purpose [2,3]. In order to form a high-quality GeO 2 layer, there are many oxidation processes to reduce D it and improve thermal stability including high-pressure oxidation [4], ozone oxidation [5], H 2 O plasma [6], and electron cyclotron resonance (ECR) plasma post oxidation [7].
In recent years, plenty of works have been reported that high-performance Ge MOSFET can be realized by post oxidation through Al 2 O 3 /Ge interface. In 2014, a Ge CMOS inverter was realized on a Ge-on-insulator (GeOI) substrate with GeO x grown by rapid thermal annealing in pure oxygen ambient after 1 nm Al 2 O 3 was deposited on Ge [8]. In ref. [7], Ge pMOSFETs and nMOSFETs with GeO x passivation were fabricated with oxygen plasma post oxidation and temperature dependence of GeO x thickness and electrical performance were also discussed. Thermal oxidation of Ge by ozone can be performed at a lower temperature, for ozone is more reactive than oxygen [5]. The impact of temperature on GeO x thickness grown by ozone on Ge surface was demonstrated. Ge pMOSFETs with GeO x passivation fabricated by ozone post oxidation was also reported [9].
In this work, Ge pMOSFETs with GeO x passivation are fabricated using ozone post oxidation (OPO) and oxygen plasma post oxidation (PPO) of the Al 2 O 3 /n-Ge interface. A comparison study on the electrical performance of Ge pMOSFETs with OPO and PPO is carried out. All the processes except passivation are precisely controlled to be the same. The post oxidation was carried out after the Al 2 O 3 block layer deposition that is different from [9] in which the post oxidation was after HfO 2 deposition. The mobility degeneration mechanism of Coulomb and roughness scattering is investigated. device performance is also discussed. Overall, we demonstrate that OPO is a promising passivation technique for future Ge MOSFET fabrication.

Methods
Ge pMOSFETs were fabricated on 4-in. n-Ge (001) wafers with a resistivity of 0.14-0.183 Ω cm. Three different passivation processes were performed, and the key process steps are shown in Fig. 1a. The wafers were cleaned by diluted HF (1:50) and deionized water for several cycles to remove the native oxide and then transferred into a plasma-enhanced atomic layer deposition PEALD (Picosun R200 Advanced) chamber immediately. Then, a thin Al 2 O 3 film (~1 nm) was deposited at 300°C with trimethylaluminium (TMA) and deionized water (H 2 O) as the precursors of Al and O, respectively. Because the Al 2 O 3 /GeO 2 layer is too thin to have a precise oxygen atom ratio, we marked these two layers as AlO x /GeO x .  The cross section of TaN/HfO 2 /AlO x /GeO x /Ge gate stack was depicted using a transmission electron microscope (TEM) to compare the impact of oxygen plasma or ozone on GeO x formation. Figure 2a and b show the cross-sectional TEM images of TaN/HfO 2 /AlO x /GeO x / Ge gate stack with PPO and OPO, respectively. The thickness of the amorphous HfO 2 layer in both devices is 6 nm. Wafer A with 60s PPO treatment have a distinct AlO x /GeO x layer between the HfO 2 and Ge substrates. This AlO x /GeO x layer in wafer B formed by 20 min OPO has an untidy margin. The thickness of the GeO x layer is in accordance with the data in [10].

Results and Discussion
The output and transfer characteristics coupled with high-frequency gate-to-source capacitance-voltage (CV) were measured by Keithley 4200-SCS. Figure 3 shows the comparison of transfer and output characteristic of Ge pMOSFETs with three different formation conditions of the AlO x /GeO x passivation layer. All the devices on various wafers have a gate length (L G ) of 3 μm. Devices on wafer A exhibit a higher saturated drain current (I DS ) compared to the other two wafers. But wafers B and C with OPO show a much lower OFF-state current (I OFF ) compared with wafer A with PPO. It is also seen that wafers B and C with OPO worked in enhancement mode and wafer A worked in depletion mode. It is inferred that, after PPO treatment, the n-Ge surface still remains to be p-type due to the high D it value which has been discussed in [11]. Wafer C with a thicker Al 2 O 3 block layer shows a positive V TH shift compared with wafer B and a higher D it than wafer B. It is observed from the output characteristics shown in Fig. 3b that, under a low gate voltage (V GS ), wafer A has a lower I DS over wafers B and C due to the less-steep subthreshold swing (SS). When the V GS increases, I DS of wafer A is getting higher in comparison with the other two devices. Therefore, from Fig. 3 and TEM images in Fig. 2, the diffusion of the AlO x /GeO x layer may suppress the I OFF , thus resulting in an improvement of passivation effects. Figure 4 summarizes the statistical results of the I ON / I OFF ratio and subthreshold swing of the devices on different wafers. Ge pMOSFETs with OPO exhibit a higher I ON /I OFF ratio (~4 orders of magnitude) and remarkably improved SS in comparison with PPO device, indicating a higher quality of the dielectric/channel interface. When compared with wafer B, wafer C exhibits a higher ON-state current (I ON ) but a lower I ON /I OFF ratio.
To further represent the interfacial layer quality of different post oxidation methods, wafers A, B, and C (dummy samples without HfO 2 and Gate metals) were tested by X-ray photoelectron spectroscopy (XPS). XPS measurement was carried out on three post oxidation dummy samples after PPO or OPO treatment without HfO 2 deposition and TaN sputtering. The stoichiometry of GeO x in Al 2 O 3 /GeO/Ge samples was investigated with a monochromatic soft Al Kα (1486.6 eV) X-ray source. Ge 3d peaks and peak-differentiating analysis are  Fig. 5. The Ge 3d 5/2 peak of the three samples is unified at 29.7 eV, and the chemical shifts of Ge 3d 3/2 , Ge 1+ , Ge 2+ , Ge 3+ , and Ge 4+ to Ge 3d 5/2 are set to 0.6, 0.8, 1.8, 2.75, and 3.4 eV, respectively [12]. In Fig. 5b, wafer A shows that after a 60s PPO, the main Ge valence in GeO x are Ge 1+ and Ge 3+ . A similar Ge valance state distribution is observed in wafer C, and a Ge 3+ component is slightly increased. In Fig. 5b, wafer B shows that an OPO device with thinner (10 cycles) Al 2 O 3 will further oxidize Ge 1+ into Ge 2+ , Ge 3+ , and Ge 4 + , while Ge 1+ is significantly reduced. The gate-to-source CV characteristics are shown in Fig. 6. From the 1-MHz CV curve, the D it near midgap is estimated by Terman's method [13], and an equivalent oxide thickness (EOT) value is also evaluated as listed in Table 1. Twenty-minute OPO (wafers B and C) results in a higher EOT as compared with PPO (wafer A). Wafer C exhibits a higher EOT over that of wafer B, due to the thicker Al 2 O 3 as a blocking layer. It has been reported that the thickness of GeO x on a bare Ge surface in O 3 ambient reaches saturation in a few minutes and the saturation thickness is dominated by temperature instead of oxidation time [10]. So in this paper, the thickness of GeO x by ozone post oxidation is saturated after a few minutes and the left oxidation time is only for annealing. Figure 7 summarizes the total resistance (R T ) versus L G of each device in this work. Here, R T is defined as V DS /I DS at V DS = 0.05 V and V GS − V TH = 1 V. The source/drain (S/D) series resistance (R SD ) and channel resistance (R CH ) can be extracted from the intercept and slope of the linear fitting of R T -L G lines as shown in Fig. 7. The extracted R SD and R CH results are summarized in Table 1. Figure 7 shows that the Ge pMOSFETs with PPO exhibit a lower R SD and R CH which is consistent with the capacitance results shown in Fig. 6.
Effective hole mobility μ eff was extracted based on a total resistance slope-based approach. In Fig. 8, we compare the μ eff of our Ge pMOSFETs with PPO and OPO treatment with those of other reported Ge pMOSFETs [9,14]. Q inv is inversion charge density in the device channel. Ge pMOSFETs with OPO exhibit a higher peak μ eff @ Q inv = 5 × 10 12 cm −2 (cm 2 /V × S) Ref. [9] −−/5 0.6 85 15.8~0.9 × 10 3 417 134 Ref. [ μ eff compared to the devices with PPO. Wafer C with a thicker Al 2 O 3 block layer has a higher peak hole mobility of 283 cm 2 /V s in comparison with wafer B with the thinner Al 2 O 3 . Wafer A with PPO exhibits a lower high-field hole μ eff with the devices with OPO, which is attributed to the lower roughness scattering. But, at low field, transistors on wafer A with PPO achieve a lower μ eff than the OPO devices due to the higher coulomb scattering [15]. Only a few works about Ge pMOSFETs fabricated by ozone passivation have been reported.
Here, a comparison of the key device performance between our devices and the reported Ge pMOSFETs treated with OPO [9,14] are carried out, and the results are shown in Table 2. It is concluded that wafer C in this work achieves the high-field μ eff enhancement and higher I ON /I OFF as compared with the reported device treated with OPO. Besides, at a Q inv of 5 × 10 12 cm − 2 , wafer C demonstrates a 2.37× higher μ eff in comparison with the Si universal mobility. The I ON of wafer C is slightly lower than that in Ref. [9] which is due to the larger EOT.

Conclusions
Ge pMOSFETs are realized with GeO x passivation, which is formed by OPO or PPO treatment of Al 2 O 3 / n-Ge in PEALD. The OPO devices exhibit the better transfer and output characteristics, the higher I ON /I OFF ratio, the improved subthreshold swing, and the higher peak μ eff compared to the PPO devices. For the 15-cycle OPO process, a thicker Al 2 O 3 layer leads to a higher EOT value and an improved μ eff in devices compared to the 10-cycle case. All the results in this work indicate that the OPO is an effective passivation way to achieve a high-quality Ge/dielectric interface and thus can be a promising candidate passivation technique for future Ge MOSFET fabrication.