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Scaling properties of ballistic nanotransistors
Nanoscale Research Letters volume 6, Article number: 365 (2011)
Abstract
Recently, we have suggested a scaleinvariant model for a nanotransistor. In agreement with experiments a closetolinear threshold trace was found in the calculated I _{D}  V _{D}traces separating the regimes of classically allowed transport and tunneling transport. In this conference contribution, the relevant physical quantities in our model and its range of applicability are discussed in more detail. Extending the temperature range of our studies it is shown that a closetolinear threshold trace results at room temperatures as well. In qualitative agreement with the experiments the I _{D}  V _{G}traces for small drain voltages show thermally activated transport below the threshold gate voltage. In contrast, at large drain voltages the gatevoltage dependence is weaker. As can be expected in our relatively simple model, the theoretical drain current is larger than the experimental one by a little less than a decade.
Introduction
In the past years, channel lengths of fieldeffect transistors in integrated circuits were reduced to arrive at currently about 40 nm [1]. Smaller conventional transistors have been built [2–9] with gate lengths down to 10 nm and below. As wellknown with decreasing channel length the desired longchannel behavior of a transistor is degraded by shortchannel effects [10–12]. One major source of these shortchannel effects is the multidimensional nature of the electrostatic field which causes a reduction of the gate voltage control over the electron channel. A second source is the advent of quantum transport. The most obvious quantum shortchannel effect is the formation of a sourcedrain tunneling regime below threshold gate voltage. Here, the I _{D}  V _{D}traces show a positive bending as opposed to the negative bending resulting for classically allowed transport [13, 14]. The sourcedrain tunneling and the classically allowed transport regime are separated by a closeto linear threshold trace (LTT). Such a behavior is found in numerous MOSFETs with channel lengths in the range of a few tens of nanometers (see, for example, [2–9]).
Starting from a threedimensional formulation of the transport problem it is possible to construct a onedimensional effective model [14] which allows to derive scaleinvariant expressions for the drain current [15, 16]. Here, the quantity arises as a natural scaling length for quantum transport where ε _{F} is the Fermi energy in the source contact and m* is the effective mass of the charge carriers. The quantum shortchannel effects were studied as a function of the dimensionless characteristic length l = L/λ of the transistor channel, where L is its physical length.
In this conference contribution, we discuss the physics of the major quantities in our scaleinvariant model which are the chemical potential, the supply function, and the scaleinvariant current transmission. We specify its range of applicability: generally, for a channel length up to a few tens of nanometers a LTT is definable up to room temperature. For higher temperatures, a LTT can only be found below a channel length of 10 nm. An inspection of the I _{D}  V _{G}traces yields in qualitative agreement with experiments that at low drain voltages transport becomes thermally activated below the threshold gate voltage while it does not for large drain voltages. Though our model reproduces interesting qualitative features of the experiments it fails to provide a quantitative description: the theoretical values are larger than the experimental ones by a little less than a decade. Such a finding is expected for our simple model.
Theory
TsuEsaki formula for the drain current
In Refs. [13, 14], the transport problem in a nanoFET was reduced to a onedimensional effective problem invoking a "singlemode abrupt transition" approximation. Here, the electrons move along the transport direction in an effective potential given
(see Figure 1b). The energy zero in Equation 1 coincides with the position of the conduction band minimum in the highly ndoped source contact. As shown in [14]
where E _{ k = 1}is the bottom of the lowest twodimensional subband resulting in the zconfinement potential of the electron channel at zero drain voltage (see Figure 4b of Ref. [13]). The parameter W is the width of the transistor. Finally, V _{D} = eU _{D} is the drain potential at drain voltage U _{D} which is assumed to fall off linearly.
Experimentally, one measures in a wide transistor the current density J, which is the current per width of the transistor that we express as
Here is the number of equivalent conduction band minima ('valleys') in the electron channel and I _{0} = 2eε _{F}/h. In Refs. [15, 16] a scaleinvariant expression
was derived. Here, m = μ/ε _{F} is the normalized chemical potential in the source contact, v _{D} = V _{D}/ε _{F} is the normalized drain voltage, and v _{G} = V _{G}/ε _{F} is the normalized gate voltage. As illustrated in Figure 1(b) the gate voltage is defined as the energy difference μ  V _{0} = V _{G}, i.e., for V _{G} > 0 the transistor operates in the ONstate regime of classically allowed transport and for V _{G} < 0 in the sourcedrain tunneling regime. The control variable V _{G} is used to eliminate the unknown variable V _{0}. For the chemical potential in the source contact one finds (see next section)
where u = k _{ B } T/ε _{F} is the normalized thermal energy. Equation 4 has the form of a TsuEsaki formula with the normalized supply function
Here, F _{1/2} is the FermiDirac integral of order 1/2 and is the inverse function of F _{1/2}. The effective current transmission depends on which is the normalized energy of the electron motion in the yzplane while is their energy in the xdirection. In the next sections, we will discuss the occurring quantities in detail.
Chemical potential in source and draincontact
For a wide enough transistor and a sufficient junction depth a (see Figure 1) the electrons in the contacts can be treated as a threedimensional noninteracting electron gas. Furthermore, we assume that all donor impurities of density N _{ i } are ionized. From charge neutrality it is then obtained that the electron density n _{0} is independent of the temperature and given by
Here m ^{e} is the effective mass and N _{V} is the valleydegeneracy factor in the contacts, respectively. In the zero temperature limit a Sommerfeld expansion of the FermiDirac integral leads to
Equating 7 and 8 results in
which is identical with (5) and plotted in Figure 2. As wellknown, with increasing temperature the chemical potential falls off because the highenergy tail of the Fermidistribution reaches up to ever higher energies.
Supply function
As shown in Ref. [14] the supply function for a wide transistor can be written as
This expression can be interpreted as the partition function (loosely speaking the "number of occupied states") in the grand canonic ensemble of a noninteracting homogeneous threedimensional electron gas in the subsystem of electrons with a given lateral wave vector (k _{ y } , k _{ z } ) yielding the energy in the yzdirection. Formally equivalent it can be interpreted as the full partition function in the grand canonic ensemble of a onedimensional electron gas at the chemical potential μ  ε. Performing the limit the Riemann sum in the variable can be replaced by the FermiDirac integral F _{1/2}. It results that
with the normalized transistor width w = W/λ. For the scaling of the supply function in Equation 11 we define (see Ref. [14])
where and we use the identity V _{0}= ε _{F} = m  v _{G}. For the source contact we write
leading to the first factor in the square bracket of the TsuEsaki equation 4. In the drain contact, the chemical potential is lower by the factor V _{D}. Replacing μ → μ  V _{D} yields
Below we will show that for transistor operation the low temperature limit is relevant (see Figure 2). Here, one may apply in leading order (resulting from a Sommerfeld expansion) and F _{1/2}(x → ∞) → exp (x). Since V _{0} > 0 the factor v _{G}  m is negative and we obtain from (12)
From Figure 3 it is seen that for ε below the chemical potential the supply function is well described by the squareroot dependence in the limit. If ε lies above the chemical chemical one obtains the limit which is a small exponential tail due to thermal activation.
Current transmission
The effective current transmission in Equation 16 is given y
It is calculated from the scattering solutions of the scaled onedimensional Schrödinger equation
with β = 2m*V _{0} L ^{2}/ħ ^{2} = l ^{2}(m  v _{G}), and ŷ = y/L. The scaled effective potential is given by , , and ,where . As usual, the scattering functions emitted from the source contact obey the asymptotic conditions and
with and .
As can be seen from Figure 4, around the current transmission changes from around zero to around one. For weak barriers there is a relatively large current transmission below one leading to drain leakage currents. For strong barriers this remnant transmission vanishes and we can approximate the current transmission by an ideal one.
To a large extent the Fowler Nordheim oscillations in the numerical transmission average out performing the integration in Equation 4.
Parameters in experimental nanoFETs
Heavily doped contacts
In the heavily doped contacts the electrons can be approximated as a threedimensional noninteracting Fermi gas. Then from (8) the Fermi energy above the bottom of the conduction band is given by
For n ^{++}doped Si contacts the valleydegeneracy is N _{V} = 6 and the effective mass is taken as . Here m _{1} = 0.19m _{0} and m _{2} = 0.98m _{0} are the effective masses corresponding to the principle axes of the constant energy ellipsoids. In our later numerical calculations we set ε _{F} = 0.35 eV assuming a level of sourcedoping as high as N _{i} = n _{0} = 10^{21} cm^{3}.
Electron channel
In the electron channel a strong lateral subband quantization exists As wellknown [17] at low temperatures only the two constant energy ellipsoids with the heavy mass m _{2} perpendicular to the (100)interface are occupied leading to a valley degeneracy of g _{v} = 2. The inplane effective mass is therefore the light mass m* = m _{1} entering the relation
Here ε _{F} = 0.35 eV was assumed. One then has in Equation 3 I _{0} = ~ 27μ A and with λ ~ 1 nm as well as = 2 one obtains J _{0} = 5.4 × 10^{4} μ A/μ m.
Results
Drain characteristics
Typical drain characteristics are plotted in Figure 5 for a low temperature (u = 0.01) and at room temperature (u = 0.1). It is seen that for both the temperatures a LTT can be identified. We define the LTT as the j  v _{D} trace which can be best fitted with a linear regression j = σ^{th} v _{D} in the given interval 0 ≤ v _{D} ≤ 2. The best fit is determined by the minimum relative mean square deviation. The gate voltage associated with the LTT is denoted with . It turns out that at room temperature lies slightly above zero and at low temperatures slightly below (see Figure 5c). In general, the temperature dependence of the drain current is small. The most significant temperature effect is the enhancement of the resonant FowlerNordheim oscillations found at negative v _{G} at low temperatures. From Figure 5d, it can be taken that the slope of the LTT σ^{th} decreases with increasing l and increasing temperature. For "hot" transistors (u = 0.2) a LTT can only be defined up to l ~ 10.
Threshold characteristics
The threshold characteristics at room temperature are plotted in Figure 6 for a "small" drain voltage (v _{D} = 0.1) and a "large" drain voltage (v _{D} = 2.0). For the largest considered characteristic length l = 60 it is seen that below zero gate voltage the drain current is thermally activated for both considered drain voltages. A comparison with the results for l = 25 and l = 10 yields that for the small drain voltage the I _{D}  V _{G} trace is only weakly effected by the change in the barrier strength. In contrast, at the high drain voltage the drain current below v _{G} = 0 grows strongly with decreasing barrier strength. The drain current does not reach the thermal activation regime any more, it falls of much smoother with increasing negative v _{G}. As can be gathered from Figure 8 this effect is seen in experiments as well. We attribute it to the weakening of the tunneling barrier with increasing v _{D}. To confirm this point the threshold characteristics for a still weaker barrier strength (l = 3) is considered. No thermal activation is found in this case even for the small drain voltage.
Discussion
We discuss our numerical results on the background of experimental characteristics for a 10 nm gate length transistor [4, 5] reproduced in Figure 7. As demonstrated in Sect. "Parameters in experimental nanoFETs" one obtains from Equation 21 a characteristic length of λ ~ 1 nm under reasonable assumptions. For the experimental 10 nm gate length, we thus obtain l = L/λ = 10. Furthermore, Equation 20 yields the value of ε _{F} = 0.35 eV. The conversion of the experimental drain voltage V into the theoretical parameter v _{D} is given by
The maximum experimental drain voltage of 0.75 V then sets the scale for v _{D} ranging from zero to v _{D} = 0.75 eV/0.35 eV ~ 2. For the conversion experimental gate voltage V _{G} to the theoretical parameter v _{G} we make linear ansatz as
where is the experimental threshold gate voltage (see Figure 8a). The constant β is chosen so that converts into . In our example, it is shown from Figure 8a = 0.15 V and from Figure 8b = 0.05, so that β = 0.2 eV. To match the experimental drain characteristic to the theoretical one we first convert the highest experimental value for V _{G} into the corresponding theoretical one. Inserting in (23) V _{G} = 0.75 V yields v _{G} ~ 0.5. Second, we adjust the experimental and the theoretical drain currentscales so that in Figure 7 the curves for the experimental current at V _{G} = 0.7 and the theoretical curve at v _{G} = 0.5 agree. It then turns out that the other corresponding experimental and theoretical traces agree as well. This agreement carries over to the range of negative gate voltages with thermally activated transport. This can be gathered from the I _{D}  V _{G} traces in Figure 8. We note that the constant of proportionality in Equation 23 given by 1 eV is more then ε _{F} which one would expect from the theoretical definition v _{G} = V _{G}/ε _{F}. Here, we emphasize that the experimental value of e V _{G} corresponds to the change of the potential at the transistor gate while the parameter v _{G} describes the position of the bottom of the lowest twodimensional subband in the electron channel. The linear ansatz in Equation 23 and especially the constant of proportionality 1 eV can thus only be justified in a selfconsistent calculation of the subband levels as has been provided, e.g., by Stern[18].
The experimental and the theoretical drain characteristics in Figure 7 look structurally very similar. For a quantitative comparison we recall from Sect. "Parameters in experimental nanoFETs" the value of J _{0} = 5.4 × 10^{4} μ A/μ m. Then the maximum value j = 0.15 in Figure 7b corresponds to a theoretical current per width of 8 × 10^{3} μ A/μ m. To compare with the experimental current per width we assume that in the yaxis labels in Figures 7a and 8a it should read μ A/μ m instead of A/μ m. The former unit is the usual one in the literature on comparable nanotransistors (see Refs. [2–9]) and with this correction the order of magnitude of the drain current per width agrees with that of the comparable transistors. It is found that the theoretical results are larger than the experimental ones by about a factor of ten. Such a failure has to be expected given the simplicity of our model. First, for an improvement it is necessary to proceed from potentials resulting in a selfconsistent calculation. Second, our representation of the transistor by an effectively onedimensional system probably underestimates the backscattering caused by the relatively abrupt transition between contacts and electron channel. Third, the drain current in a real transistor is reduced by impurity interaction, in particular, by inelastic scattering. As a final remark we note that in transistors with a gate length in the micrometer scale shortchannel effects may occur which are structurally similar to the ones discussed in this article (see Sect. 8.4 of [10]). Therefore, a quantitatively more reliable quantum calculation would be desirable allowing to distinguish between the shortchannel effects on micrometer scale and quantum shortchannel effects.
Summary
After a detailed discussion of the physical quantities in our scaleinvariant model we show that a LTT is present not only in the low temperature limit but also at room temperatures. In qualitative agreement with the experiments the I _{D}  V _{G}traces exhibit below the threshold voltage thermally activated transport at small drain voltages. At large drain voltages the gatevoltage dependence of the traces is much weaker. It is found that the theoretical drain current is larger than the experimental one by a little less than a decade. Such a finding is expected for our simple model.
Abbreviations
 LTT:

linear threshold trace.
References
 1.
Auth C, Buehler H, Cappellani A, Choi Hh, Ding G, Han W, Joshi S, McIntyre B, Prince M, Ranade P, Sandford J, Thomas C: 45 nm Highk+Metal Gate StrainEnhanced Transistors. Intel Technol J 2008, 12: 77–85.
 2.
Yu B, Wang H, Joshi A, Xiang Q, Ibok E, Lin MR: 15 nm Gate Length Planar CMOS Transistor. IEDM Tech Dig 2001, 937.
 3.
Doris B, Ieong M, Kanarsky T, Zhang Y, Roy RA, Dokumaci O, Ren Z, Jamin FF, Shi L, Natzle W, Huang HJ, Mezzapelle J, Mocuta A, Womack S, Gribelyuk M, Jones EC, Miller RJ, Wong HSP, Haensch W: Extreme Scaling with UltraThin Si Channel MOSFETs. IEDM Tech Dig 2002, 267.
 4.
Doyle B, Arghavani R, Barlage D, Datta S, Doczy M, Kavalieros J, Murthy A, Chau R: Transistor Elements for 30 nm Physical Gate Lengths. Intel Technol J 2002, 6: 42.
 5.
Chau R, Doyle B, Doczy M, Datta S, Hareland S, Jin B, Kavalieros J, Metz M: Silicon NanoTransistors and Breaking the 10 nm Physical Gate Length Barrier. 61st Device Research Conference 2003; Salt Lake City, Utah (invited talk)
 6.
Tyagi S, Auth C, Bai P, Curello G, Deshpande H, Gannavaram S, Golonzka O, Heussner R, James R, Kenyon C, Lee SH, Lindert N, Miu M, Nagisetty R, Natarajan S, Parker C, Sebastian J, Sell B, Sivakumar S, St Amur A, Tone K: An advanced low power, high performance, strained channel 65 nm technology. IEDM Tech Dig 2005, 1070.
 7.
Natarajan S, Armstrong M, Bost M, Brain R, Brazier M, Chang CH, Chikarmane V, Childs M, Deshpande H, Dev K, Ding G, Ghani T, Golonzka O, Han W, He J, Heussner R, James R, Jin I, Kenyon C, Klopcic S, Lee SH, Liu M, Lodha S, McFadden B, Murthy A, Neiberg L, Neirynck J, Packan P, Pae S, Parker C, Pelto C, Pipes L, Sebastian J, Seiple J, Sell B, Sivakumar S, Song B, Tone K, Troeger T, Weber C, Yang M, Yeoh A, Zhang K: A 32 nm Logic Technology Featuring 2ndGeneration Highk + MetalGate Transistors, Enhanced Channel Strain and 0.171 μm ^{ 2 } SRAM Cell Size in a 291 Mb Array. IEDM Tech Dig 2008, 1.
 8.
Fukutome H, Hosaka K, Kawamura K, Ohta H, Uchino Y, Akiyama S, Aoyama T: Sub30nm FUSI CMOS Transistors Fabricated by Simple Method Without Additional CMP Process. IEEE Electron Dev Lett 2008, 29: 765.
 9.
Bedell SW, Majumdar A, Ott JA, Arnold J, Fogel K, Koester SJ, Sadana DK: Mobility Scaling in ShortChannel Length Strained GeonInsulator PMOSFETs. IEEE Electron Dev Lett 2008, 29: 811.
 10.
Sze SM: Physics of Semiconductor Devices. New York: Wiley; 1981.
 11.
Thompson S, Packan P, Bohr M: MOS Scaling: Transistor Challenges for the 21st Century. Intel Technol J 1998, Q3: 1.
 12.
Brennan KF: Introduction to Semiconductor Devices. Cambridge: Cambridge University Press; 2005.
 13.
Nemnes GA, Wulf U, Racec PN: Nanotransistors in the LandauerBüttiker formalism. J Appl Phys 2004, 96: 596. 10.1063/1.1748858
 14.
Nemnes GA, Wulf U, Racec PN: Nonlinear IV characteristics of nanotransistors in the LandauerBüttiker formalism. J Appl Phys 2005, 98: 84308. 10.1063/1.2113413
 15.
Wulf U, Richter H: Scaling in quantum transport in silicon nanotransistors. Solid State Phenomena 2010, 156–158: 517.
 16.
Wulf U, Richter H: Scaleinvariant drain current in nanoFETs. J Nano Res 2010, 10: 49.
 17.
Ando T, Fowler AB, Stern F: Electronic properties of twodimensional systems. Rev Mod Phys 1982, 54: 437. 10.1103/RevModPhys.54.437
 18.
Stern F: SelfConsistent Results for nType Si Inversion Layers. Phys Rev B 1972, 5: 4891. 10.1103/PhysRevB.5.4891
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Authors' contributions
UW worked out the theroretical model, carried out numerical calculations and drafted the manuscript. MK carried out numerical calculations and drafted the manuscript. HR drafted the manuscript. All authors read and approved the final manuscript.
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Wulf, U., Krahlisch, M. & Richter, H. Scaling properties of ballistic nanotransistors. Nanoscale Res Lett 6, 365 (2011). https://doi.org/10.1186/1556276X6365
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Keywords
 Gate Voltage
 Drain Current
 Supply Function
 Gate Length
 Drain Voltage