Skip to main content
Figure 3 | Nanoscale Research Letters

Figure 3

From: Direct selective growth of ZnO nanowire arrays from inkjet-printed zinc acetate precursor on a heated substrate

Figure 3

ZnO nanowire network transistor demonstration. (a) Schematic illustration of the transistor. ‘S’ and ‘D’ indicate source and drain electrodes, respectively. (b) Output and (c) transfer characteristics of the ZnO NWNT with 10-μm channel length. For output characteristics measurement, the drain voltage (Vd) was scanned from 0 to 5 V and the drain current (Id) was measured while the gate voltage (Vg) was fixed at -30, -5, 20, 45, and 70 V during each Vd scanning. Vg was scanned from -30 to 70 V and the drain current (Id) was measured while Vd was fixed at 5 V for transfer characteristics measurement.

Back to article page