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Fig. 5 | Nanoscale Research Letters

Fig. 5

From: Voltage-Polarity Dependent Programming Behaviors of Amorphous In–Ga–Zn–O Thin-Film Transistor Memory with an Atomic-Layer-Deposited ZnO Charge Trapping Layer

Fig. 5

The threshold voltage shifts of the a-IGZO TFT memory devices with different processed ZnO charge trapping layers as a function of a positive programming voltage for constant programming time of 80 ms and b negative programming voltage for constant programming time of 1 μs. For each condition, five devices were measured.

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