Fig. 1
From: Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory
Schematic diagrams of a 3-T TRAM unit cell and b cross-point vertical 3-T TRAM array
Fig. 1 | Nanoscale Research Letters
From: Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory
Schematic diagrams of a 3-T TRAM unit cell and b cross-point vertical 3-T TRAM array