Table 1 Operating voltage condition of 3-T TRAM array
From: Highly Reliable Memory Operation of High-Density Three-Terminal Thyristor Random Access Memory
Operation mode | VA, (V) | Word line (WL), VG (V) | Bit line (BL), VC (V) | ||
|---|---|---|---|---|---|
Selected | Un-sel | Selected | Un-sel | ||
Standby | 0.6 | − 0.4 | 0.0 | ||
Program | − 0.4 | − 1.2 | − 0.8 | 0.0 | |
Erase | 0.8 | − 0.4 | 0.4 | 1.2 | |
Read | − 0.8 | − 0.8 | 0.0 | ||