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Fig. 5 | Nanoscale Research Letters

Fig. 5

From: Design of GAA Nanosheet Ferroelectric Area Tunneling FET and Its Significance with DC/RF Characteristics Including Linearity Analyses

Fig. 5

a Collective comparison of the FATFET and ATFETs at different drain bias points (\(V_{{\rm D}} = 0.01\) and 0.5 V). A voltage gain of \(\approx\) 0.2 V as \(V_{{\rm int}}\) is achieved in FATFET than the ATFET that amplifies \(I_{{\rm on}}\). b Hysteresis observation in FATFET through scaled \(t_{{\rm fe}}\) during forward (solid) and reverse gate-bias sweep (dotted). Higher the \(t_{{\rm fe}}\) larger will be the hysteresis

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