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Fig. 7 | Nanoscale Research Letters

Fig. 7

From: Design of GAA Nanosheet Ferroelectric Area Tunneling FET and Its Significance with DC/RF Characteristics Including Linearity Analyses

Fig. 7

The TAT of FATFETs in both the off-state (\(V_{{\rm D}}=0.5\,\hbox{V}\), \(V_{{\rm G}}=0\,\hbox{V}\)) and on-state (\(V_{{\rm D}}=0.5\,\hbox{V}\), \(V_{{\rm G}}=0.5\,\hbox{V}\)) states, resulting from a position-dependent electron TAT and b defect level TAT, respectively. Position dependent electron TAT can be identified along the \(p^{++}\)-n and p-n junctions, while defect level TAT at the Si/\(\hbox{Si}_{0.6}\hbox{Ge}_{0.4}\) interfaces. c Impact of TAT on \(I_{{\rm D}}\)\(V_{{\rm G}}\) characteristics; inset shows less than 1-order high \(I_{{\rm off}}\) due to overall contribution of TAT

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